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72V805L15PFG PDF预览

72V805L15PFG

更新时间: 2024-11-26 20:55:07
品牌 Logo 应用领域
艾迪悌 - IDT 时钟先进先出芯片内存集成电路
页数 文件大小 规格书
26页 264K
描述
FIFO, 256X18, 10ns, Synchronous, CMOS, PQFP128, GREEN, TQFP-128

72V805L15PFG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:TQFP-128针数:128
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.84
最长访问时间:10 ns最大时钟频率 (fCLK):66.7 MHz
周期时间:15 nsJESD-30 代码:R-PQFP-G128
JESD-609代码:e3长度:20 mm
内存密度:4608 bit内存集成电路类型:OTHER FIFO
内存宽度:18湿度敏感等级:3
功能数量:1端子数量:128
字数:256 words字数代码:256
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:256X18
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP128,.63X.87,20
封装形状:RECTANGULAR封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.01 A
子类别:FIFOs最大压摆率:0.06 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:14 mm
Base Number Matches:1

72V805L15PFG 数据手册

 浏览型号72V805L15PFG的Datasheet PDF文件第2页浏览型号72V805L15PFG的Datasheet PDF文件第3页浏览型号72V805L15PFG的Datasheet PDF文件第4页浏览型号72V805L15PFG的Datasheet PDF文件第5页浏览型号72V805L15PFG的Datasheet PDF文件第6页浏览型号72V805L15PFG的Datasheet PDF文件第7页 
IDT72V805  
IDT72V815  
IDT72V825  
IDT72V835  
IDT72V845  
3.3 VOLT CMOS DUAL SyncFIFO™  
DUAL 256 x 18, DUAL 512 x 18,  
DUAL 1,024 x 18, DUAL 2,048 x 18  
and DUAL 4,096 x 18  
Easily expandable in depth and width  
FEATURES:  
Asynchronous or coincident Read and Write Clocks  
Asynchronous or synchronous programmable Almost-Empty  
and Almost-Full flags with default settings  
The IDT72V805 is equivalent to two IDT72V205 256 x 18 FIFOs  
The IDT72V815 is equivalent to two IDT72V215 512 x 18 FIFOs  
The IDT72V825 is equivalent to two IDT72V225 1,024 x 18 FIFOs  
The IDT72V835 is equivalent to two IDT72V235 2,048 x 18 FIFOs  
The IDT72V845 is equivalent to two IDT72V245 4,096 x 18 FIFOs  
Offers optimal combination of large capacity (8K), high speed,  
design flexibility, and small footprint  
Half-Full flag capability  
Output enable puts output data bus in high-impedance state  
High-performance submicron CMOS technology  
Available in a 128-pin thin quad flatpack (TQFP)  
Industrial temperature range (–40°C to +85°C) is available  
Green parts available, see ordering information  
Ideal for the following applications:  
Network switching  
Two level prioritization of parallel data  
Bidirectional data transfer  
Bus-matching between 18-bit and 36-bit data paths  
Width expansion to 36-bit per package  
Depth expansion to 8,192 words per package  
10 ns read/write cycle time  
5V input tolerant  
IDT Standard or First Word Fall Through timing  
Single or double register-buffered Empty and Full Flags  
DESCRIPTION:  
The IDT72V805/72V815/72V825/72V835/72V845 are dual 18-bit-wide  
synchronous (clocked)First-in, First-out(FIFO)memories designedtorun  
off a 3.3V supply for exceptionally low power consumption. One dual  
IDT72V805/72V815/72V825/72V835/72V845deviceisfunctionallyequiva-  
lenttotwoIDT72V205/72V215/72V225/72V235/72V245FIFOs ina single  
package with all associated control, data, and flag lines assigned to  
independentpins. These devices are veryhigh-speed, low-powerFirst-In,  
FUNCTIONAL BLOCK DIAGRAM  
HFA/(WXOA)  
FFA/IRA  
PAEA  
EFA/  
ORA  
WCLKA  
WENA  
WCLKB  
DA0-DA17  
LDA  
WENB  
DB0-DB17  
LDB  
PAFA  
INPUT  
REGISTER  
OFFSET  
REGISTER  
INPUT  
REGISTER  
OFFSET  
REGISTER  
FFB/IRB  
FLAG  
PAFB  
WRITE  
FLAG  
LOGIC  
WRITE  
EFB/ORB  
PAEB  
HFB/(WXOB)  
RAM  
CONTROL  
LOGIC  
LOGIC  
CONTROL  
LOGIC  
RAM  
ARRAY  
ARRAY  
256 x 18  
512 x 18  
1,024 x 18  
2,048 x 18  
4,096 x 18  
256 x 18  
512 x 18  
1,024 x 18  
2,048 x 18  
4,096 x 18  
READ  
POINTER  
WRITE  
POINTER  
READ  
POINTER  
WRITE  
POINTER  
FLA  
WXIA  
(HFA)/WXOA  
RXIA  
READ  
CONTROL  
LOGIC  
READ  
CONTROL  
LOGIC  
EXPANSION  
LOGIC  
EXPANSION  
LOGIC  
OUTPUT  
REGISTER  
OUTPUT  
REGISTER  
RXOA  
RESET  
LOGIC  
RSA  
RESET  
LOGIC  
RSB  
RXOB  
RXIB  
(HFB)/WXOB  
WXIB  
FLB  
RCLKB  
RCLKA  
OEB  
QA0-QA17  
RENB  
RENA  
OEA  
QB0-QB17  
4295 drw 01  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology, Inc. TheSyncFIFOisatrademarkofIntegratedDeviceTechnology, Inc.  
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES  
FEBRUARY 2009  
1
©
2009 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
DSC-4295/4  

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