Datasheet > 7204L12PDG

7204L12PDG

更新时间： 2024-11-12 19:22:47

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片光电二极管
页数	文件大小	规格书
14页	125K
描述
FIFO, 4KX9, 12ns, Asynchronous, CMOS, PDIP28, GREEN, PLASTIC, DIP-28

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技术参数
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7204L12PDG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	DIP
包装说明：	,	针数：	28
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	风险等级：	5.07
JESD-609代码：	e3	湿度敏感等级：	1
峰值回流温度（摄氏度）：	260	电源：	5 V
认证状态：	Not Qualified	子类别：	FIFOs
端子面层：	Matte Tin (Sn) - annealed	处于峰值回流温度下的最长时间：	30
Base Number Matches：	1

7204L12PDG 数据手册

IDT7203

IDT7204

IDT7205

IDT7206

IDT7207

IDT7208

CMOS ASYNCHRONOUS FIFO

2,048 x 9, 4,096 x 9

8,192 x 9, 16,384 x 9

32,768 x 9 and 65,536 x 9

•

Industrial temperature range (–40

(plastic packages only)

°C to +85°C) is available

FEATURES:

• First-In/First-Out Dual-Port memory

• 2,048 x 9 organization (IDT7203)

• Green parts available, see ordering information

• 4,096 x 9 organization (IDT7204)

• 8,192 x 9 organization (IDT7205)

DESCRIPTION:

• 16,384 x 9 organization (IDT7206)

• 32,768 x 9 organization (IDT7207)

• 65,636 x 9 organization (IDT7208)

• High-speed: 12ns access time

TheIDT7203/7204/7205/7206/7207/7208aredual-portmemorybuffers

withinternalpointersthatloadandemptydataonafirst-in/first-outbasis. The

deviceusesFullandEmptyflagstopreventdataoverflowandunderflowand

expansionlogictoallowforunlimitedexpansioncapabilityinbothwordsizeand

depth.

• Low power consumption

— Active: 660mW (max.)

— Power-down: 44mW (max.)

DataistoggledinandoutofthedevicethroughtheuseoftheWrite(W)and

Read (R) pins.

• Asynchronous and simultaneous read and write

• Fully expandable in both word depth and width

• Pin and functionally compatible with IDT720X family

• Status Flags: Empty, Half-Full, Full

• Retransmit capability

• High-performance CMOS technology

• Military product compliant to MIL-STD-883, Class B

• Standard Military Drawing for #5962-88669 (IDT7203), 5962-89567

(IDT7203), and 5962-89568 (IDT7204) are listed on this function

The device's 9-bit width provides a bit for a control or parity at the user’s

option. ItalsofeaturesaRetransmit(RT)capabilitythatallowsthereadpointer

to be reset to its initial position when RT is pulsed LOW. A Half-Full Flag is

available inthe single device andwidthexpansionmodes.

These FIFOs are fabricatedusingIDT’s high-speedCMOStechnology.

Theyaredesignedforapplicationsrequiringasynchronousandsimultaneous

read/writesinmultiprocessing,ratebufferingandotherapplications.

Militarygradeproductismanufacturedincompliancewiththelatestrevision

of MIL-STD-883, Class B.

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

)

(D -D

WRITE

CONTROL

RAM ARRAY

2,048 x 9

4,096 x 9

8,192 x 9

16,384 x 9

32,768 x 9

65,536 x 9

WRITE

POINTER

READ

POINTER

THREE-

STATE

BUFFERS

DATA OUTPUTS

READ

CONTROL

)

(Q₀-Q

RESET

LOGIC

FLAG

LOGIC

FL/RT

EXPANSION

LOGIC

XO/HF

2661 drw01

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.

COMMERCIAL,MILITARYANDINDUSTRIALTEMPERATURERANGES

APRIL 2010

DSC-2661/17

12 3 4 5 6 7...14

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与7204L12PDG相关器件

型号	品牌	获取价格	描述	数据表
7204L12PDGB	IDT	获取价格	FIFO
7204L12PDGI	IDT	获取价格	FIFO
7204L12PG	IDT	获取价格	FIFO, 4KX9, 12ns, Asynchronous, CMOS, PDIP28, PLASTIC, DIP-28
7204L12PGB8	IDT	获取价格	CMOS ASYNCHRONOUS FIFO
7204L12PGI8	IDT	获取价格	CMOS ASYNCHRONOUS FIFO
7204L12SOG	IDT	获取价格	SOIC-28, Tube
7204L12SOGB	IDT	获取价格	FIFO
7204L12SOGB8	IDT	获取价格	FIFO
7204L12SOGI8	IDT	获取价格	FIFO
7204L12TC	IDT	获取价格	FIFO, 4KX9, 12ns, Asynchronous, CMOS, CDIP28

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