Datasheet > 7202LA50PG

7202LA50PG

更新时间： 2024-11-21 07:22:11

品牌	Logo	应用领域
艾迪悌 - IDT		先进先出芯片光电二极管
页数	文件大小	规格书
14页	144K
描述
FIFO, 1KX9, 50ns, Asynchronous, CMOS, PDIP28, 0.600 INCH, PLASTIC, DIP-28

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7202LA50PG 数据手册

CMOS ASYNCHRONOUS FIFO

256 x 9, 512 x 9 and 1,024 x 9

IDT7200L

IDT7201LA

IDT7202LA

FEATURES:

DESCRIPTION:

•

First-In/First-Out dual-port memory

256 x 9 organization (IDT7200)

512 x 9 organization (IDT7201)

1,024 x 9 organization (IDT7202)

Low power consumption

TheIDT7200/7201/7202aredual-portmemoriesthatloadandemptydata

onafirst-in/first-outbasis. ThedevicesuseFullandEmptyflagstopreventdata

overflowandunderflowandexpansionlogictoallowforunlimitedexpansion

capabilityinbothwordsizeanddepth.

The reads and writes are internally sequential through the use of ring

pointers,withnoaddressinformationrequiredtoloadandunloaddata. Data

istoggledinandoutofthedevicesthroughtheuseoftheWrite(W)andRead

(R) pins.

Thedevicesutilizea9-bitwidedataarraytoallowforcontrolandparitybits

attheuser’soption. Thisfeatureisespeciallyusefulindatacommunications

applicationswhereitisnecessarytouseaparitybitfortransmission/reception

errorchecking. ItalsofeaturesaRetransmit(RT)capabilitythatallowsforreset

of the read pointer to its initial position when RT is pulsed LOW to allow for

retransmissionfromthebeginningofdata. AHalf-FullFlagisavailableinthe

singledevicemodeandwidthexpansionmodes.

— Active: 440mW (max.)

—Power-down: 28mW (max.)

•

Ultra high speed—12ns access time

Asynchronous and simultaneous read and write

Fully expandable by both word depth and/or bit width

Pin and functionally compatible with 720X family

Status Flags: Empty, Half-Full, Full

Auto-retransmit capability

High-performance CEMOS™ technology

Military product compliant to MIL-STD-883, Class B

Standard Military Drawing #5962-87531, 5962-89666, 5962-89863

and 5962-89536 are listed on this function

TheseFIFOs arefabricatedusingIDT’s high-speedCMOStechnology.

They are designed for those applications requiring asynchronous and

•

Dual versions available in the TSSOP package. For more informa- simultaneous read/writes in multiprocessing and rate buffer applications.

tion, see IDT7280/7281/7282 data sheet

IDT7280 = 2 x IDT7200

Militarygradeproductismanufacturedincompliancewiththelatestrevisionof

MIL-STD-883, Class B.

IDT7281 = 2 x IDT7201

IDT7282 = 2 x IDT7202

•

Industrial temperature range (–40^oC to +85^oC) is available

(plastic packages only)

FUNCTIONAL BLOCK DIAGRAM

DATA INPUTS

(D0-D8)

WRITE

CONTROL

RAM

ARRAY

256 x 9

WRITE

POINTER

READ

POINTER

512 x 9

1,024 x 9

THREE-

STATE

BUFFERS

DATA OUTPUTS

READ

(Q0-Q8)

RESET

LOGIC

CONTROL

FLAG

LOGIC

FL/RT

EXPANSION

LOGIC

2679 drw 01

XO/HF

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.

SEPTEMBER 2002

COMMERCIAL, INDUSTRIAL AND MILITARY TEMPERATURE RANGES



DSC-2679/9

12 3 4 5 6 7...14

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与7202LA50PG相关器件

型号	品牌	获取价格	描述	数据表
7202LA50SO	IDT	获取价格	SOIC-28, Tube
7202LA50SOG	IDT	获取价格	FIFO, 1KX9, 50ns, Asynchronous, CMOS, PDSO28, GREEN, SOIC-28
7202LA50TC	IDT	获取价格	FIFO, 1KX9, 50ns, Asynchronous, CMOS, CDIP28
7202LA50TD	IDT	获取价格	FIFO, 1KX9, 50ns, Asynchronous, CMOS, CDIP28
7202LA50TDG	IDT	获取价格	FIFO, 1KX9, 50ns, Asynchronous, CMOS, CDIP28
7202LA50TPB	IDT	获取价格	FIFO, 1KX9, 50ns, Asynchronous, CMOS, PDIP28, THIN, PLASTIC, DIP-28
7202LA65DB	IDT	获取价格	FIFO, 1KX9, 65ns, Asynchronous, CMOS, CDIP28
7202LA65P	IDT	获取价格	FIFO, 1KX9, 65ns, Asynchronous, CMOS, PDIP28
7202LA65TC	IDT	获取价格	FIFO, 1KX9, 65ns, Asynchronous, CMOS, CDIP28
7202LA65TP	IDT	获取价格	FIFO, 1KX9, 65ns, Asynchronous, CMOS, PDIP28

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