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71V30L35TF PDF预览

71V30L35TF

更新时间: 2023-02-26 13:46:42
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
14页 121K
描述
TQFP-64, Tray

71V30L35TF 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TQFP
针数:64Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.2最长访问时间:35 ns
I/O 类型:COMMONJESD-30 代码:S-PQFP-G64
JESD-609代码:e0内存密度:8192 bit
内存集成电路类型:MULTI-PORT SRAM内存宽度:8
湿度敏感等级:3端口数量:2
端子数量:64字数:1024 words
字数代码:1000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:1KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3.3 V
认证状态:Not Qualified最大待机电流:0.003 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.115 mA标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

71V30L35TF 数据手册

 浏览型号71V30L35TF的Datasheet PDF文件第2页浏览型号71V30L35TF的Datasheet PDF文件第3页浏览型号71V30L35TF的Datasheet PDF文件第4页浏览型号71V30L35TF的Datasheet PDF文件第5页浏览型号71V30L35TF的Datasheet PDF文件第6页浏览型号71V30L35TF的Datasheet PDF文件第7页 
IDT71V30S/L  
HIGH-SPEED 3.3V  
1K X 8 DUAL-PORT  
STATIC RAM  
Features  
High-speed access  
On-chip port arbitration logic  
Interrupt flags for port-to-port communication  
– Commercial: 25/35/55ns (max.)  
Low-power operation  
IDT71V30S  
Active: 375mW (typ.)  
Standby: 5mW (typ.)  
IDT71V30L  
Active: 375mW (typ.)  
Standby: 1mW (typ.)  
Fully asynchronous operation from either port  
Battery backup operation, 2V data retention (L Only)  
TTL-compatible, single 3.3V ±0.3V power supply  
Industrial temperature range (-40OC to +85OC) is available  
for selected speeds  
Green parts available, see ordering information  
Functional Block Diagram  
OE  
R
OE  
CE  
L
CER  
L
R/W  
R
R/WL  
I/O0R-I/O7R  
I/O0L- I/O7L  
I/O  
Control  
I/O  
Control  
(1)  
L
(1)  
BUSYR  
BUSY  
A
9L  
0L  
A
9R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
A
10  
10  
ARBITRATION  
and  
INTERRUPT  
LOGIC  
CE  
L
L
CE  
OE  
R/W  
R
R
OE  
R
R/W  
L
(2)  
L
(2)  
INT  
INTR  
3741 drw 01  
NOTES:  
1. IDT71V30: BUSY outputs are non-tristatable push-pulls.  
2. INT outputs are non-tristable push-pull output structure.  
NOVEMBER 2009  
1
DSC 3741/10  
©2009IntegratedDeviceTechnology,Inc.  

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