Datasheet > 71V30S25TFGI8

71V30S25TFGI8

更新时间： 2024-01-06 10:19:39

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
15页	628K
描述
HIGH-SPEED 3.3V 1K X 8 DUAL-PORT STATIC RAM

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中文翻译

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数据手册

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71V30S25TFGI8 数据手册

IDT71V30S/L

HIGH-SPEED 3.3V

1K X 8 DUAL-PORT

STATIC RAM

Features

◆

High-speed access

On-chip port arbitration logic

◆

Interrupt flags for port-to-port communication

– Commercial: 25/35/55ns (max.)

– Industrial 35ns (max.)

Fully asynchronous operation from either port

Battery backup operation, 2V data retention (L Only)

TTL-compatible, single 3.3V ±0.3V power supply

Industrial temperature range (-40^OC to +85^OC) is available

for selected speeds

◆

Low-power operation

– IDT71V30S

— Active: 375mW (typ.)

— Standby: 5mW (typ.)

– IDT71V30L

— Active: 375mW (typ.)

— Standby: 1mW (typ.)

◆

Green parts available, see ordering information

Functional Block Diagram

OEL

R/WL

R/W

I/O0R-I/O7R

I/O0L- I/O7L

I/O

Control

I/O

Control

(1)

BUSYR

BUSY

Address

Decoder

MEMORY

ARRAY

Address

Decoder

ARBITRATION

and

INTERRUPT

LOGIC

R/W

(2)

INTL

INTR

3741 drw 01

NOTES:

1. IDT71V30: BUSY outputs are non-tristatable push-pulls.

2. INT outputs are non-tristable push-pull output structure.

JULY 2015

DSC 3741/12

12 3 4 5 6 7...15

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