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71V2558SA200BGG PDF预览

71V2558SA200BGG

更新时间: 2023-02-15 00:00:00
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器
页数 文件大小 规格书
28页 567K
描述
ZBT SRAM, 256KX18, 3.2ns, CMOS, PBGA119, 22 X 14 MM, ROHS COMPLIANT, PLASTIC, MS-028AA, BGA-119

71V2558SA200BGG 数据手册

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IDT71V2556, IDT71V2558, 128K x 36, 256K x 18, 3.3V Synchronous ZBT™ SRAMs  
with 2.5V I/O, Burst Counter, and Pipelined Outputs  
Commercial and Industrial Temperature Ranges  
JTAG Identification Register Definitions (SA Version only)  
Instruction Field  
Revision Number (31:28)  
Value  
Description  
0x2  
0x210, 0x212  
0x33  
Reserved for version number.  
IDT Device ID (27:12)  
Defines IDT part number 71V2556SA and 71V2558SA, respectively.  
Allows unique identification of device vendor as IDT.  
Indicates the presence of an ID register.  
IDT JEDEC ID (11:1)  
ID Register Indicator Bit (Bit 0)  
1
I4875 tbl 02  
AvailableJTAGInstructions  
Instruction  
Description  
OPCODE  
Forces contents of the boundary scan cells onto the device outputs(1).  
Places the boundary scan register (BSR) between TDI and TDO.  
EXTEST  
0000  
Places the boundary scan register (BSR) between TDI and TDO.  
SAMPLE allows data from device inputs(2) and outputs(1) to be captured  
in the boundary scan cells and shifted serially through TDO. PRELOAD  
allows data to be input serially into the boundary scan cells via the TDI.  
SAMPLE/PRELOAD  
0001  
Loads the JTAG ID register (JIDR) with the vendor ID code and places  
the register between TDI and TDO.  
DEVICE_ID  
HIGHZ  
0010  
0011  
Places the bypass register (BYR) between TDI and TDO. Forces all  
device output drivers to a High-Z state.  
RESERVED  
RESERVED  
RESERVED  
RESERVED  
0100  
0101  
0110  
0111  
Several combinations are reserved. Do not use codes other than those  
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,  
VALIDATE and BYPASS instructions.  
Uses BYR. Forces contents of the boundary scan cells onto the device  
outputs. Places the bypass register (BYR) between TDI and TDO.  
CLAMP  
1000  
RESERVED  
RESERVED  
RESERVED  
RESERVED  
1001  
1010  
1011  
1100  
Same as above.  
Automatically loaded into the instruction register whenever the TAP  
controller passes through the CAPTURE-IR state. The lower two bits '01'  
are mandated by the IEEE std. 1149.1 specification.  
VALIDATE  
1101  
RESERVED  
BYPASS  
Same as above.  
1110  
1111  
The BYPASS instruction is used to truncate the boundary scan register  
as a single bit in length.  
I4875 tbl 04  
NOTES:  
1. Device outputs = All device outputs except TDO.  
2. Device inputs = All device inputs except TDI, TMS, and TRST.  
6.42  
23  

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