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71T016SA15BFG8 PDF预览

71T016SA15BFG8

更新时间: 2024-01-04 11:13:45
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
9页 99K
描述
Standard SRAM, 64KX16, 15ns, CMOS, PBGA48, 7 X 7 MM, PLASTIC, FBGA-48

71T016SA15BFG8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:BGA
包装说明:7 X 7 MM, PLASTIC, FBGA-48针数:48
Reach Compliance Code:compliantECCN代码:3A991.B.2.B
HTS代码:8542.32.00.41风险等级:5.83
最长访问时间:15 nsJESD-30 代码:S-PBGA-B48
JESD-609代码:e1长度:7 mm
内存密度:1048576 bit内存集成电路类型:STANDARD SRAM
内存宽度:16湿度敏感等级:3
功能数量:1端子数量:48
字数:65536 words字数代码:64000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:64KX16
封装主体材料:PLASTIC/EPOXY封装代码:LFBGA
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.34 mm
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:0.75 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:7 mm
Base Number Matches:1

71T016SA15BFG8 数据手册

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Advance  
Information  
IDT71T016SA  
2.5V CMOS Static RAM  
1 Meg (64K x 16-Bit)  
Features  
Description  
64K x 16 advanced high-speed CMOS Static RAM  
TheIDT71T016isa1,048,576-bithigh-speedStaticRAMorganized  
as64Kx16.ItisfabricatedusingIDT’shigh-perfomance,high-reliability  
CMOStechnology.Thisstate-of-the-arttechnology,combinedwithinno-  
vativecircuitdesigntechniques,providesacost-effectivesolutionforhigh-  
speedmemoryneeds.  
Equal access and cycle times  
— Commercial:10/12/15/20ns  
Industrial:12/15/20ns  
One Chip Select plus one Output Enable pin  
Bidirectional data inputs and outputs directly  
TheIDT71T016has anoutputenablepinwhichoperates as fastas  
5ns,withaddressaccesstimesasfastas10ns.Allbidirectionalinputsand  
outputsoftheIDT71T016areLVTTL-compatibleandoperationisfroma  
single2.5Vsupply.Fullystaticasynchronouscircuitryisused,requiring  
noclocks orrefreshforoperation.  
LVTTL-compatible  
Low power consumption via chip deselect  
Upper and Lower Byte Enable Pins  
Single 2.5V power supply  
Available in 44-pin Plastic SOJ, 44-pin TSOP, and 48-Ball  
The IDT71T016 is packaged in a JEDEC standard a 44-pin Plastic  
SOJ, 44-pin TSOP Type II, and a 48-ball plastic 7 x 7 mm FBGA.  
Plastic FBGA packages  
Functional Block Diagram  
Output  
Enable  
Buffer  
OE  
Address  
Buffers  
Row / Column  
Decoders  
A0 – A15  
I/O15  
High  
Byte  
I/O  
8
8
Chip  
Enable  
Buffer  
CS  
Buffer  
I/O8  
Sense  
Amps  
and  
Write  
Drivers  
16  
64K x 16  
Memory  
Array  
Write  
Enable  
Buffer  
WE  
I/O7  
I/O0  
Low  
Byte  
I/O  
8
8
Buffer  
BHE  
BLE  
Byte  
Enable  
Buffers  
5326 drw 01  
AUGUST 2001  
1
©2001 IntegratedDeviceTechnology,Inc.  
DSC-5326/00  

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