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70V9389L9PFGI PDF预览

70V9389L9PFGI

更新时间: 2024-11-29 00:51:43
品牌 Logo 应用领域
艾迪悌 - IDT 时钟静态存储器内存集成电路
页数 文件大小 规格书
19页 251K
描述
SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM

70V9389L9PFGI 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP, QFP100,.63SQ,20针数:100
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.84
最长访问时间:20 ns其他特性:FLOW-THROUGH OR PIPELINED ARCHITECTURE
最大时钟频率 (fCLK):66 MHzI/O 类型:COMMON
JESD-30 代码:S-PQFP-G100JESD-609代码:e3
长度:14 mm内存密度:1179648 bit
内存集成电路类型:DUAL-PORT SRAM内存宽度:18
湿度敏感等级:3功能数量:1
端口数量:2端子数量:100
字数:65536 words字数代码:64000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:64KX18
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装等效代码:QFP100,.63SQ,20
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1.6 mm最大待机电流:0.002 A
最小待机电流:3 V子类别:SRAMs
最大压摆率:0.24 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:14 mmBase Number Matches:1

70V9389L9PFGI 数据手册

 浏览型号70V9389L9PFGI的Datasheet PDF文件第2页浏览型号70V9389L9PFGI的Datasheet PDF文件第3页浏览型号70V9389L9PFGI的Datasheet PDF文件第4页浏览型号70V9389L9PFGI的Datasheet PDF文件第5页浏览型号70V9389L9PFGI的Datasheet PDF文件第6页浏览型号70V9389L9PFGI的Datasheet PDF文件第7页 
HIGH-SPEED 3.3V  
64K x18/x16  
IDT70V9389/289L  
SYNCHRONOUS PIPELINED  
DUAL-PORT STATIC RAM  
LEAD FINISH (SnPb) ARE IN EOL PROCESS - LAST TIME BUY EXPIRES JUNE 15, 2018  
Features:  
True Dual-Ported memory cells which allow simultaneous  
access of the same memory location  
High-speed clock to data access  
– Commercial: 7.5/9/12ns (max.)  
– Industrial: 9ns (max.)  
Full synchronous operation on both ports  
– 4ns setup to clock and 0ns hold on all control, data, and  
addressinputs  
– Data input, address, and control registers  
– Fast 7.5ns clock to data out in the Pipelined output mode  
– Self-timedwriteallowsfastcycletime  
– 12ns cycle time, 83MHz operation in Pipelined output  
mode  
Separate upper-byte and lower-byte controls for  
multiplexed bus and bus matching compatibility  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Low-power operation  
– IDT70V9389/289L  
Active:500mW(typ.)  
Standby: 1.5mW (typ.)  
Flow-Through or Pipelined output mode on either port via  
the FT/PIPE pins  
Counter enable and reset features  
Dual chip enables allow for depth expansion without  
additional logic  
Available in a 128-pin Thin Quad Flatpack (TQFP) and  
100-pin Thin Quad Flatpack (TQFP)  
Green parts available, see ordering information  
LVTTL- compatible, single 3.3V ( 0.3V) power supply  
Functional Block Diagram  
R/  
UB  
W
L
L
R/  
UB  
W
R
R
CE0L  
CE0R  
1
0
1
0
CE1L  
CE1R  
0/1  
0/1  
LB  
L
LB  
OE  
R
OE  
L
R
1b 0b  
0a 1a  
1a 0a  
a
0b 1b  
b
FT/PIPE  
L
0/1  
0/1  
FT/PIPER  
b
a
(2)  
(1)  
I/O9L-I/O17L  
I/O9R-I/O17R  
I/O  
I/O  
Control  
Control  
(1)  
(1)  
I/O0R-I/O8R  
I/O0L-I/O8L  
A
15R  
A
15L  
0L  
Counter/  
Address  
Reg.  
Counter/  
Address  
Reg.  
A
MEMORY  
ARRAY  
A
0R  
CLK  
CLK  
ADS  
CNTEN  
L
R
R
L
ADS  
L
L
CNTEN  
R
CNTRST  
CNTRST  
R
4856 drw 01  
NOTES:  
1. I/O0X - I/O7X for IDT70V9289.  
2. I/O8X - I/O15X for IDT70V9289.  
MARCH 2018  
1
©2018 Integrated Device Technology, Inc.  
DSC-4856/9  

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