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7016L12JG PDF预览

7016L12JG

更新时间: 2024-11-24 00:23:31
品牌 Logo 应用领域
艾迪悌 - IDT 静态存储器内存集成电路
页数 文件大小 规格书
21页 351K
描述
HIGH-SPEED 16K X 9 DUAL-PORT STATIC RAM

7016L12JG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:PLCC
包装说明:QCCJ, LDCC68,1.0SQ针数:68
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.39
Samacsys Description:PLCC最长访问时间:12 ns
I/O 类型:COMMONJESD-30 代码:S-PQCC-J68
JESD-609代码:e3长度:24.2062 mm
内存密度:147456 bit内存集成电路类型:DUAL-PORT SRAM
内存宽度:9湿度敏感等级:1
功能数量:1端口数量:2
端子数量:68字数:16384 words
字数代码:16000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:16KX9输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC68,1.0SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:PARALLEL
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:4.57 mm
最大待机电流:0.005 A最小待机电流:4.5 V
子类别:SRAMs最大压摆率:0.275 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:24.2062 mm
Base Number Matches:1

7016L12JG 数据手册

 浏览型号7016L12JG的Datasheet PDF文件第2页浏览型号7016L12JG的Datasheet PDF文件第3页浏览型号7016L12JG的Datasheet PDF文件第4页浏览型号7016L12JG的Datasheet PDF文件第5页浏览型号7016L12JG的Datasheet PDF文件第6页浏览型号7016L12JG的Datasheet PDF文件第7页 
HIGH-SPEED  
16K X 9 DUAL-PORT  
STATIC RAM  
IDT7016S/L  
IDT7016 easily expands data bus width to 18 bits or  
Features  
more using the Master/Slave select when cascading  
more than one device  
M/S = VIH for BUSY output flag on Master  
M/S = VIL for BUSY input on Slave  
Busy and Interrupt Flag  
On-chip port arbitration logic  
Full on-chip hardware support of semaphore signaling  
between ports  
Fully asynchronous operation from either port  
TTL-compatible, single 5V (±10%) power supply  
Available in ceramic 68-pin PGA, 68-pin PLCC, and an  
80-pin TQFP  
Industrial temperature range (–40°C to +85°C) is  
available for selected speeds  
Green parts available, see ordering information  
True Dual-Ported memory cells which allow simulta-  
neous reads of the same memory location  
High-speed access  
– Commercial:12/15/20/25/35ns (max.)  
– Industrial: 20ns (max.)  
– Military: 20/25/35ns (max.)  
Low-power operation  
– IDT7016S  
Active: 750mW (typ.)  
Standby: 5mW (typ.)  
– IDT7016L  
Active: 750mW (typ.)  
Standby: 1mW (typ.)  
Functional Block Diagram  
OEL  
OER  
CER  
CEL  
R/WR  
R/W  
L
I/O0L- I/O8L  
I/O0R-I/O8R  
I/O  
I/O  
Control  
Control  
BUSY (1,2)  
L
(1,2)  
BUSY  
R
A
13L  
A
13R  
0R  
Address  
Decoder  
MEMORY  
ARRAY  
Address  
Decoder  
A
A
0L  
14  
14  
ARBITRATION  
INTERRUPT  
SEMAPHORE  
LOGIC  
CE  
OE  
L
L
CE  
OE  
R/W  
R
R
R
R/W  
L
SEM  
L
SEM  
R
M/S  
(2)  
(2)  
INTL  
INT  
R
3190 drw 01  
NOTES:  
1. In MASTER mode: BUSY is an output and is a push-pull driver  
InSLAVEmode:BUSYisinput.  
2. BUSYoutputsandINToutputsarenon-tri-statedpush-pulldrivers.  
OCTOBER2014  
1
©2014 Integrated Device Technology, Inc.  
DSC 3190/11  

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