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5HP24-A-212.500-1T PDF预览

5HP24-A-212.500-1T

更新时间: 2024-11-12 03:20:35
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描述
Oscillator,

5HP24-A-212.500-1T 数据手册

  
PECL OSCILLATORS  
HP24 PECL OSCILLATORS  
4 Pin SMD Pa cka g e  
OUTLINES & DIMENSIONS  
FEATURES  
·
·
·
·
·
Sta b le a n d cle a n 100KH d iffe re n tia l sig n a ls  
Use s in ve rte d m e sa , fun d a m e n ta l m od e crysta ls  
No PLL, m ultip lie r or ove rton e -m od e crysta ls use d  
Ve ry low jitte r < 1p s  
Sta n d a rd 14 p in DIL, 4 p in SMD p a cka g e  
GENERAL SPECIFICATION  
Outp ut Wa ve form :  
PECL 100K square wave  
Fundamental mode crystal  
19.440MHz to 250MHz  
38.880, 44.736, 50.0, 77.76,  
100.0, 106.25, 125.0, 155.52,  
166.6286, 200.0, 207.360 and  
212.500MHz (partial list)  
See table  
Fre q ue n cy Ra n g e :  
Sta n d a rd Fre q ue n cie s:  
Fre q ue n cy Sta b ility:  
In p ut Volta g e Vcc  
LVPECL  
PECL  
+ 3.3V± 5%  
2.25V min.  
+ 5.0V± 5%  
3.95V min.  
4.05V typ.  
4.15V max.  
3.15V min.  
3.25V typ.  
3.35V max.  
OH  
Outp ut Volta g e HIGH 1’ V  
:
JITTER (Exa m p le )  
OL  
LOW 0’ V  
:
1.65V max.  
Jitte r a t 155.520MHz 5.0Volts  
p ico se con d s RMS m a x.  
Curre n t Con sum p tion :  
Loa d :  
See table  
50W into Vcc-2V  
or Thevenin equivalent*  
1.5ns max (20%~ 80%Vcc)  
50± 2% typ., 50± 5% max.  
(both outputs)  
1Hz ~ 1MHz  
20  
10Hz ~ 1MHz  
100Hz ~ 1MHz  
12kHz ~ 20MHz  
10Hz ~ 20MHz  
1.8  
0.2  
1.0  
5.0  
Rise / Fa ll Tim e s:  
Duty Cycle :  
Jitte r:  
See table  
SSB Ph a se n oise :  
-50dBc @ 10Hz offset  
-80dBc @ 100Hz offset  
-110dBc @ 1kHz offset  
-135dBc @ 10kHz offset  
-145dBc @ 100kHz offset  
-145dBc @ 1MHz offset  
10ms max.  
MODEL OPTIONS  
Pt. No.  
Suffix  
Pin 8  
Pin 14  
Pin 1  
Pin 7  
Blank  
-1C  
No Connection Case Ground PECL Output Supply Voltage  
Complimentary Case Ground PECL Output Supply Voltage  
PECL output  
Sta rt-up Tim e :  
Ag e in g :  
Stora g e Te m p e ra ture :  
Tri-sta te Op tion  
± 2ppm/ year max.  
-55° to + 100°C  
-1T  
Tristate  
Case Ground PECL Output Supply Voltage  
PECL output is disabled and complementary output remains high  
when Tristate pin is HIGH. Both PECL and complementary PECL  
outputs are high when Tristate pin is LOW.  
ORDER CODE  
* Terminating resistors required on all outputs.)  
FREQUENCY STABILITY  
Sup p ly  
Volta g e  
HP24  
Sta b ility Cod e  
(A to F)  
Nom in a l  
Fre q ue n cy  
Op tion s  
Te m p e ra ture Ra n g e Ord e r Cod e  
Sta b ility  
(p p m )  
0°~ + 70°C  
-40°~ + 85°C  
Stability Code  
A to F or  
Cxx or Ixx  
Package  
Style  
Nominal  
Frequency  
3for + 3.3V  
5for + 5.0V  
Options  
See table  
± 25  
± 50  
± 100  
A
B
C
D
E
F
Note: For non-standard frequency stability for commercial temperature  
range use the CodeC’ followed by the stability, example ‘C20’ for  
± 20ppm over 0° to + 70°C. For industrial temperature range use I’  
and the stability, example ‘I20’ for ± 20ppm over -40° to + 85°C.  
EXAMPLE:  
5HP24-A-125.0-1T  
This describes HP24 package PECL, + 5.0Volt supply, ± 25ppm over 0°to  
+ 70°C, at frequency of 125.0MHz with Tristate option.  
CURRENT CONSUMPTION  
Curre n t Con sum p tion (m A)  
77.760MHz  
155.520MHz  
+ 3.3  
+ 5.0  
58  
85  
54  
73  
EUROQUARTZ LIMITED Bla ckn e ll La n e CREWKERNE Som e rse t UK TA18 7HE  
Te l: + 44 1460 230000 Fa x: + 44 1460 230001 e m a il: in fo@e uroq ua rtz.co.uk we b : www.e uroq ua rtz.co.uk