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5CSEMA6F31C8N PDF预览

5CSEMA6F31C8N

更新时间: 2024-02-24 10:58:21
品牌 Logo 应用领域
英特尔 - INTEL 可编程逻辑
页数 文件大小 规格书
66页 1360K
描述
Field Programmable Gate Array, 110000-Cell, CMOS, PBGA896, ROHS COMPLIANT, FBGA-896

5CSEMA6F31C8N 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:BGA, BGA896,30X30,40Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:2.06
JESD-30 代码:S-PBGA-B896JESD-609代码:e1
长度:31 mm湿度敏感等级:3
输入次数:288逻辑单元数量:110000
输出次数:288端子数量:896
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA896,30X30,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
电源:1.1,1.2/3.3,2.5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:2 mm
子类别:Field Programmable Gate Arrays最大供电电压:1.13 V
最小供电电压:1.07 V标称供电电压:1.1 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:31 mmBase Number Matches:1

5CSEMA6F31C8N 数据手册

 浏览型号5CSEMA6F31C8N的Datasheet PDF文件第5页浏览型号5CSEMA6F31C8N的Datasheet PDF文件第6页浏览型号5CSEMA6F31C8N的Datasheet PDF文件第7页浏览型号5CSEMA6F31C8N的Datasheet PDF文件第9页浏览型号5CSEMA6F31C8N的Datasheet PDF文件第10页浏览型号5CSEMA6F31C8N的Datasheet PDF文件第11页 
Page 8  
Electrical Characteristics  
OCT Specifications  
If you enable on-chip termination (OCT) calibration, calibration is automatically  
performed at power up for I/Os connected to the calibration block.  
Table 8 lists the Cyclone V OCT termination calibration accuracy specifications. The  
OCT calibration accuracy is valid at the time of calibration only.  
Table 8. OCT Calibration Accuracy Specifications for Cyclone V Devices  
Calibration Accuracy  
–C7, –I7  
Symbol  
Description  
Conditions (V)  
Unit  
%
–C6  
–C8, –A7  
Internal series termination  
with calibration  
(25-Ω setting)  
V
CCIO = 3.0, 2.5,  
1.8, 1.5, 1.2  
25-Ω RS  
15  
15  
15  
15  
15  
Internal series termination  
with calibration  
(50-Ω setting)  
V
CCIO = 3.0, 2.5,  
1.8, 1.5, 1.2  
50-Ω RS  
15  
15  
15  
15  
%
Internal series termination  
V
CCIO = 1.5, 1.35,  
1.25, 1.2  
34-Ω and 40-Ω RS with calibration  
%
(34-Ω and 40-Ω setting)  
Internal series termination  
with calibration  
(48-Ω, 60-Ω, and 80-Ω  
setting)  
48-Ω, 60-Ω, and  
80-Ω RS  
V
CCIO = 1.2  
15  
15  
15  
%
%
%
Internal parallel  
termination with calibration  
(50-Ω setting)  
V
CCIO = 2.5, 1.8,  
1.5, 1.2  
50-Ω RT  
-10 to +40  
-10 to +40  
-10 to +40  
-10 to +40  
-10 to +40  
-10 to +40  
Internal parallel  
20-Ω, 30-Ω,  
40-Ω, 60-Ω, and  
120-Ω RT  
termination with calibration  
(20-Ω, 30-Ω, 40-Ω,  
60-Ω, and 120-Ω setting)  
V
CCIO = 1.5, 1.35,  
1.25  
Internal parallel  
60-Ω and 120-Ω RT termination with calibration  
V
CCIO = 1.2  
-10 to +40  
15  
-10 to +40  
15  
-10 to +40  
15  
%
%
(60-Ω and 120-Ω setting)  
Internal left shift series  
termination with calibration  
(25-Ω RS_left_shift setting)  
V
CCIO = 3.0, 2.5,  
1.8, 1.5, 1.2  
25-Ω RS_left_shift  
1
Calibration accuracy for the calibrated on-chip series termination (RS OCT) and  
on-chip parallel termination (RT OCT) are applicable at the moment of calibration.  
When process, voltage, and temperature (PVT) conditions change after calibration,  
the tolerance may change.  
Cyclone V Device Datasheet  
July 2014 Altera Corporation  

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