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5962R9679701VXC PDF预览

5962R9679701VXC

更新时间: 2024-10-29 20:30:59
品牌 Logo 应用领域
瑞萨 - RENESAS 输出元件
页数 文件大小 规格书
7页 177K
描述
HC/UH SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP20

5962R9679701VXC 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:DFP, FL20,.3针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.72其他特性:WITH DIRECTION CONTROL
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
系列:HC/UHJESD-30 代码:R-CDFP-F20
JESD-609代码:e4逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.006 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:DFP封装等效代码:FL20,.3
封装形状:RECTANGULAR封装形式:FLATPACK
电源:5 VProp。Delay @ Nom-Sup:23 ns
传播延迟(tpd):28 ns认证状态:Not Qualified
筛选级别:38535V;38534K;883S座面最大高度:2.92 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:GOLD
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL总剂量:100k Rad(Si) V
翻译:N/A宽度:6.92 mm
Base Number Matches:1

5962R9679701VXC 数据手册

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HCS245MS  
Radiation Hardened  
Octal Bus Transceiver, Three-State, Non-Inverting  
December 1992  
Features  
Pinouts  
20 PIN CERAMIC DUAL-IN-LINE  
• 3 Micron Radiation Hardened CMOS SOS  
• Total Dose 200K or 1 Mega-RAD(Si)  
• Latch-Up Free Under Any Conditions  
MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD FINISH C  
TOP VIEW  
1
2
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
OE  
B0  
B1  
B2  
B3  
B4  
B5  
DIR  
A0  
• Fanout (Over Temperature Range)  
- Bus Driver Outputs - 15 LSTTL Loads  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
3
A1  
4
A2  
5
A3  
6
A4  
• LSTTL Input Compatibility  
- VIL = 0.8V Max  
- VIH = VCC/2 Min  
7
A5  
8
A6  
9
A7  
B6  
B7  
• Input Current Levels Ii 5µA at VOL, VOH  
10  
GND  
Description  
20 PIN CERAMIC FLAT PACK  
MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C  
TOP VIEW  
The Intersil HCS245MS is a Radiation Hardened Non-Invert-  
ing Octal Bidirectional Bus Transceiver, Three-State,  
intended for two-way asynchronous communication between  
data busses. The HCS245MS allows data transmission from  
the A bus to the B bus or from the B bus to the A bus. The  
logic level at the direction input (DIR) determines the data  
direction. The output enable input (OE) puts the I/O port in  
the high-impedance state when high.  
VCC  
OE  
B0  
B1  
B2  
B3  
B4  
B5  
DIR  
A0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A1  
A2  
A3  
The HCS245MS utilizes advanced CMOS/SOS technology  
to achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
A4  
A5  
A6  
The HCS245MS is supplied in a 20 lead Weld Seal Ceramic  
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line  
Package (D suffix).  
A7  
B6  
B7  
GND  
Functional Diagram  
Truth Table  
ONE OF 8 TRANSCEIVERS  
CONTROL  
INPUTS  
A DATA  
9
OE  
L
DIR  
L
OPERATION  
B Data to A Bus  
A Data to B Bus  
Isolation  
(2, 3, 4, 5,  
6, 7, 8)  
B DATA  
11  
(18, 17, 16, 15,  
14, 13, 12)  
L
H
TO OTHER  
7 BUFFERS  
H
X
H = High Voltage Level, L = Low Voltage Level,  
X = Immaterial  
DIR  
1
To prevent excess currents in the High-Z (Isolation)  
modes, all I/O terminals should be terminated with 10kΩ  
to 1Mresistors.  
OUTPUT  
ENABLE  
19  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 2468.1  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-475  

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