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5962R0724903QXC

更新时间： 2024-01-03 17:37:10
品牌 Logo 应用领域
英特矽尔 - INTERSIL 开关控制器
页数 文件大小 规格书
11页 648K
描述
Radiation Hardened, High Performance IndustryStandard Single-Ended Current Mode PWM Controller

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5962R0724903QXC 技术参数

是否Rohs认证：符合生命周期：Transferred
零件包装代码：DFP包装说明：DFP, FL8,.25
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.18Is Samacsys：N
模拟集成电路 - 其他类型：SWITCHING CONTROLLER控制模式：CURRENT-MODE
控制技术：PULSE WIDTH MODULATION最大输入电压：13.2 V
最小输入电压：9 VJESD-30 代码：R-CDFP-F8
JESD-609代码：e4长度：6.485 mm
功能数量：1端子数量：8
最高工作温度：125 °C最低工作温度：-55 °C
最大输出电流：1 A封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DFP封装等效代码：FL8,.25
封装形状：RECTANGULAR封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
筛选级别：MIL-PRF-38535 Class V座面最大高度：2.92 mm
子类别：Switching Regulator or Controllers表面贴装：YES
切换器配置：SINGLE最大切换频率：1000 kHz
温度等级：MILITARY端子面层：Gold (Au)
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
总剂量：100k Rad(Si) V宽度：6.475 mm
Base Number Matches：1

5962R0724903QXC 数据手册

 浏览型号5962R0724903QXC的Datasheet PDF文件第5页浏览型号5962R0724903QXC的Datasheet PDF文件第6页浏览型号5962R0724903QXC的Datasheet PDF文件第7页浏览型号5962R0724903QXC的Datasheet PDF文件第8页浏览型号5962R0724903QXC的Datasheet PDF文件第10页浏览型号5962R0724903QXC的Datasheet PDF文件第11页 
ISL78840ASRH, ISL78841ASRH, ISL78843ASRH, ISL78845ASRH  
R
= 295mΩ  
current is required reduces the charging current into  
RTCT and will reduce the oscillator frequency.  
CS  
Determine the amount of voltage, Ve, that must be  
added to the current feedback signal using Equation 12.  
Fault Conditions  
A Fault condition occurs if V  
falls below 4.65V. When a  
Fault is detected OUT is disabled. When V exceeds  
Ve = 92.4mV  
REF  
REF  
Using Equation 17, solve for the summing resistor, R ,  
9
from CT to CS.  
4.80V, the Fault condition clears, and OUT is enabled.  
Ground Plane Requirements  
R = 2.67kΩ  
9
Careful layout is essential for satisfactory operation of  
the device. A good ground plane must be employed. A  
unique section of the ground plane must be designated  
for high di/dt currents associated with the output stage.  
Determine the new value of R (R’ ) using  
Equation 18.  
CS  
CS  
R’ = 350mΩ  
CS  
V
should be bypassed directly to GND with good high  
DD  
Additional slope compensation may be considered for  
design margin. The above discussion determines the  
minimum external ramp that is required. The buffer  
transistor used to create the external ramp from RTCT  
should have a sufficiently high gain (>200) so as to  
minimize the required base current. Whatever base  
frequency capacitors.  
References  
[1] Ridley, R., “A New Continuous-Time Model for  
Current Mode Control”, IEEE Transactions on Power  
Electronics, Vol. 6, No. 2, April 1991.  
FN6991.0  
December 21, 2009  
9
1...67891011

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