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5962F9211804VYA PDF预览

5962F9211804VYA

更新时间: 2024-11-26 23:23:15
品牌 Logo 应用领域
其他 - ETC 外围集成电路数据传输控制器通信时钟
页数 文件大小 规格书
55页 354K
描述
Controller Miscellaneous - Datasheet Reference

5962F9211804VYA 数据手册

 浏览型号5962F9211804VYA的Datasheet PDF文件第2页浏览型号5962F9211804VYA的Datasheet PDF文件第3页浏览型号5962F9211804VYA的Datasheet PDF文件第4页浏览型号5962F9211804VYA的Datasheet PDF文件第5页浏览型号5962F9211804VYA的Datasheet PDF文件第6页浏览型号5962F9211804VYA的Datasheet PDF文件第7页 
REVISIONS  
LTR  
A
DESCRIPTION  
Changes in accordance with NOR 5962-R208-93.  
Changes in accordance with NOR 5962-R187-94.  
Add device type 02. Editorial changes throughout.  
Changes in accordance with NOR 5962-R299-97.  
DATE (YR-MO-DA)  
93-08-06  
APPROVED  
Monica L. Poelking  
Monica L. Poelking  
Monica L. Poelking  
Monica L. Poelking  
Monica L. Poelking  
Monica L. Poelking  
B
94-06-08  
C
96-01-05  
D
97-05-29  
E
Add device type 03. Editorial changes throughout. - TVN  
98-06-29  
F
In table IA: Add test conditions for IIN; change the limits for QIDD; remove the test  
condition VDD = 4.5 V for all the propagation delay tests; change the limits for ta  
and ti in memory read timing section; change the limits of tc in DMA timing  
section; and change the limit of ta in JTAG timing section. Include pin connections  
for case outlines X and Z in radiation exposure connections. Editorial changes  
throughout. - TVN  
98-09-18  
G
In table I, change IIN limits; add a footnote to QIDD; add tc in power-up master reset  
timing section. Correct the JTAG timing waveforms. – TVN  
99-05-26  
Monica L. Poelking  
H
J
Add device type 04. Editorial changes throughout. – TVN  
00-07-18  
01-03-15  
Monica L. Poelking  
Thomas M. Hess  
Add notes to memory write and memory read waveforms. Add figure B-1 to  
appendix A. Editorial changes throughout. – TVN  
REV  
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REV STATUS  
OF SHEETS  
SHEET  
1
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4
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PREPARED BY  
Thomas M. Hess  
PMIC N/A  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216  
CHECKED BY  
Thomas M. Hess  
http://www.dscc.dla.mil  
STANDARD  
MICROCIRCUIT  
DRAWING  
APPROVED BY  
Monica L. Poelking  
MICROCIRCUIT, DIGITAL, CMOS, MIL-STD-1553  
SERIAL MICROCODED MONOLITHIC MULTI-MODE  
INTELLIGENT TERMINAL, MONOLITHIC SILICON  
THIS DRAWING IS AVAILABLE  
FOR USE BY ALL  
DRAWING APPROVAL DATE  
93-06-07  
DEPARTMENTS  
REVISION LEVEL  
SIZE  
CAGE CODE  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
5962-92118  
A
67268  
J
AMSC N/A  
SHEET  
1
OF  
45  
DSCC FORM 2233  
APR 97  
5962-E271-01  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  

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