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5962-9760401Q2A PDF预览

5962-9760401Q2A

更新时间: 2024-01-08 13:46:25
品牌 Logo 应用领域
德州仪器 - TI 栅极逻辑集成电路输入元件
页数 文件大小 规格书
25页 1292K
描述
QUADRUPLE 2-INPUT POSITIVE-NOR GATES

5962-9760401Q2A 技术参数

生命周期:Active零件包装代码:QLCC
包装说明:LCC-20针数:20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5.5
Is Samacsys:N系列:LVC/LCX/Z
JESD-30 代码:S-CQCC-N20长度:8.89 mm
负载电容(CL):50 pF逻辑集成电路类型:NOR GATE
最大I(ol):0.024 A功能数量:4
输入次数:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:QCCN
封装等效代码:LCC20,.35SQ封装形状:SQUARE
封装形式:CHIP CARRIER包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
最大电源电流(ICC):0.01 mAProp。Delay @ Nom-Sup:4.4 ns
传播延迟(tpd):5.4 ns认证状态:Qualified
施密特触发器:NO筛选级别:MIL-PRF-38535 Class Q
座面最大高度:2.03 mm子类别:Gate
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.89 mmBase Number Matches:1

5962-9760401Q2A 数据手册

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SN54LVC02A, SN74LVC02A  
QUADRUPLE 2-INPUT POSITIVE-NOR GATES  
www.ti.com  
SCAS280QJANUARY 1993REVISED JULY 2005  
DESCRIPTION/ORDERING INFORMATION (CONTINUED)  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
FUNCTION TABLE  
(EACH GATE)  
INPUTS  
OUTPUT  
Y
A
H
X
L
B
X
H
L
L
L
H
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)  
A
Y
B
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.5  
–0.5  
MAX  
6.5  
UNIT  
V
VCC  
VI  
Supply voltage range  
Input voltage range(2)  
6.5  
V
VO  
IIK  
Output voltage range(2)(3)  
–0.5 VCC + 0.5  
V
Input clamp current  
VI < 0  
–50  
–50  
±50  
±100  
86  
mA  
mA  
mA  
mA  
IOK  
IO  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCC or GND  
D package(4)  
DB package(4)  
NS package(4)  
PW package(4)  
RGY package(5)  
96  
θJA  
Package thermal impedance  
76  
°C/W  
113  
47  
Tstg  
Ptot  
Storage temperature range  
Power dissipation  
–65  
150  
500  
°C  
TA = –40°C to 125°C(6)(7)  
mW  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The value of VCC is provided in the recommended operating conditions table.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
(5) The package thermal impedance is calculated in accordance with JESD 51-5.  
(6) For the D package: above 70°C, the value of Ptot derates linearly with 8 mW/K.  
(7) For the DB, NS, and PW packages: above 60°C, the value of Ptot derates linearly with 5.5 mW/K.  
2

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