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5962-9476101MXC

更新时间： 2024-10-29 21:06:55
品牌 Logo 应用领域
莱迪思 - LATTICE 时钟输入元件可编程逻辑
页数 文件大小 规格书
12页 143K
描述
EE PLD, 25ns, 96-Cell, CMOS, PQCC68, JLCC-68

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5962-9476101MXC 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：LCC包装说明：JLCC-68
针数：68Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.79其他特性：IN-SYSTEM PROGRAMMABLE; 4 EXTERNAL CLOCKS
最大时钟频率：38 MHz系统内可编程：YES
JESD-30 代码：S-PQCC-J68JTAG BST：NO
长度：24.13 mm湿度敏感等级：1
专用输入次数：1I/O 线路数量：48
宏单元数：96端子数量：68
最高工作温度：125 °C最低工作温度：-55 °C
组织：1 DEDICATED INPUTS, 48 I/O输出函数：MACROCELL
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC68,1.0SQ封装形状：SQUARE
封装形式：CHIP CARRIER峰值回流温度（摄氏度）：225
电源：5 V可编程逻辑类型：EE PLD
传播延迟：25 ns认证状态：Not Qualified
筛选级别：MIL-STD-883座面最大高度：4.826 mm
子类别：Programmable Logic Devices最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：J BEND
端子节距：1.27 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：24.13 mm
Base Number Matches：1

5962-9476101MXC 数据手册

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®
ispLSI 1024/883  
In-System Programmable High Density PLD  
Functional Block Diagram  
Features  
• HIGH-DENSITY PROGRAMMABLE LOGIC  
— High-Speed Global Interconnect  
— 4000 PLD Gates  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
C7  
C6  
C5  
C4  
C3  
C2  
C1  
C0  
— 48 I/O Pins, Six Dedicated Inputs  
— 144 Registers  
— Wide Input Gating for Fast Counters, State  
Machines, Address Decoders, etc.  
— Small Logic Block Size for Fast Random Logic  
— Security Cell Prevents Unauthorized Copying  
D
D
D
D
Q
Q
Q
Q
Logic  
Array  
GLB  
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY  
— fmax = 60 MHz Maximum Operating Frequency  
— tpd = 20 ns Propagation Delay  
Global Routing Pool (GRP)  
— TTL Compatible Inputs and Outputs  
— Electrically Erasable and Reprogrammable  
— Non-Volatile E2CMOS Technology  
— 100% Tested  
B0 B1 B2 B3 B4 B5 B6 B7  
Output Routing Pool  
CLK  
• IN-SYSTEM PROGRAMMABLE  
— In-System Programmable™ (ISP™) 5-Volt Only  
— Increased Manufacturing Yields, Reduced Time-to-  
Market, and Improved Product Quality  
0139-A-isp  
Description  
— Reprogram Soldered Devices for Faster Debugging  
• COMBINES EASE OF USE AND THE FAST SYSTEM  
SPEED OF PLDs WITH THE DENSITY AND FLEX-  
IBILITY OF FIELD PROGRAMMABLE GATE ARRAYS  
The ispLSI 1024/883 is a High-Density Programmable  
Logic Device processed in full compliance to MIL-STD-  
883. This military grade device contains 144 Registers,  
48 Universal I/O pins, six Dedicated Input pins, four  
Dedicated Clock Input pins and a Global Routing Pool  
(GRP). The GRP provides complete interconnectivity  
between all of these elements. The ispLSI 1024/883  
features5-Voltin-systemprogrammabilityandin-system  
diagnostic capabilities. It is the first device which offers  
non-volatile reprogrammability of the logic, as well as the  
interconnect to provide truly reconfigurable systems.  
— Complete Programmable Device Can Combine Glue  
Logic and Structured Designs  
— Four Dedicated Clock Input Pins  
— Synchronous and Asynchronous Clocks  
— Flexible Pin Placement  
— Optimized Global Routing Pool Provides Global  
Interconnectivity  
• ispDesignEXPERT™ – LOGIC COMPILER AND COM-  
PLETE ISP DEVICE DESIGN SYSTEMS FROM HDL  
SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING  
— Superior Quality of Results  
The basic unit of logic on the ispLSI 1024/883 device is  
theGenericLogicBlock(GLB).TheGLBsarelabeledA0,  
A1 .. C7 (see figure 1). There are a total of 24 GLBs in the  
ispLSI 1024/883 device. Each GLB has 18 inputs, a  
programmable AND/OR/XOR array, and four outputs  
which can be configured to be either combinatorial or  
registered. Inputs to the GLB come from the GRP and  
dedicatedinputs. AlloftheGLBoutputsarebroughtback  
into the GRP so that they can be connected to the inputs  
of any other GLB on the device.  
— Tightly Integrated with Leading CAE Vendor Tools  
— Productivity Enhancing Timing Analyzer, Explore  
Tools, Timing Simulator and ispANALYZER™  
— PC and UNIX Platforms  
unctional Block Diagram  
Copyright©2000LatticeSemiconductorCorp. Allbrandorproductnamesaretrademarksorregisteredtrademarksoftheirrespectiveholders. Thespecificationsandinformationhereinaresubject  
to change without notice.  
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.  
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com  
September 2000  
1024MIL_01  
1
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5962-9476101MXC 替代型号

型号 品牌 替代类型 描述 数据表
MACH220-20JC LATTICE

功能相似

 High-Density EE CMOS Programmable Logic
ISPLSI1024-60LH/883 LATTICE

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 In-System Programmable High Density PLD

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