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5962-9461204H4C PDF预览

5962-9461204H4C

更新时间: 2024-01-22 21:31:58
品牌 Logo 应用领域
MICROSS 内存集成电路
页数 文件大小 规格书
22页 442K
描述
Flash Module, 512KX32, 70ns, CHIP66, 1.075 INCH, CERAMIC, HIP-66

5962-9461204H4C 技术参数

生命周期:Obsolete包装说明:1.075 INCH, CERAMIC, HIP-66
Reach Compliance Code:unknown风险等级:5.64
Is Samacsys:N最长访问时间:70 ns
其他特性:USER CONFIGURABLE AS 2M X 8备用内存宽度:16
JESD-30 代码:S-CHIP-P66JESD-609代码:e4
长度:27.305 mm内存密度:16777216 bit
内存集成电路类型:FLASH MODULE内存宽度:32
功能数量:1端子数量:66
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-55 °C组织:512KX32
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:HIP
封装形状:SQUARE封装形式:IN-LINE
并行/串行:PARALLEL编程电压:5 V
认证状态:Not Qualified座面最大高度:4.6 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:GOLD端子形式:PIN/PEG
端子节距:2.54 mm端子位置:HEX
类型:NOR TYPE宽度:27.305 mm
Base Number Matches:1

5962-9461204H4C 数据手册

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FLASH  
AS8F512K32  
Austin Semiconductor, Inc.  
512K x 32 FLASH  
PIN ASSIGNMENT  
(Top View)  
FLASH MEMORY ARRAY  
68 Lead CQFP (Q)  
AVAILABLE AS MILITARY  
SPECIFICATIONS  
SMD5962-94612  
MIL-STD-883  
FEATURES  
Fast Access Times: 70, 90, 120 and 150ns  
Operation with single 5V (±10%)  
Theta JC= 1.00°C/w  
User configurable as 512Kx32, 1Mx16, or 2Mx8  
Eight Equal Sectors of 64K Bytes for each 512Kx8  
Compatible with JEDEC EEPROM command set  
Any Combination of Sectors can be Erased  
Supports Full Chip Erase  
Embedded Erase and Program Algorithms  
TTL Compatible Inputs and CMOS Outputs  
Built in decoupling caps for low noise operation  
Suspend Erase/Resume Function  
66 Lead PGA (P)  
Individual Byte Read/ Write Control  
10,000 Program/Erase Cycles  
OPTIONS  
MARKINGS  
Timing  
70ns  
90ns  
120ns  
150ns  
-70  
-90  
-120  
-150  
Package  
Ceramic Quad Flat pack  
Pin Grid Array  
Q
P
No. 702  
No. 904  
GENERAL DESCRIPTION  
The Austin Semiconductor, Inc. AS8F512K32 is a 16 Megabit  
CMOS FLASH Memory Module organized as 512Kx32 bits. The  
AS8F512K32 achieves high speed access (70 to 150 ns), low power  
consumption and high reliability by employing advanced CMOS memory  
technology.  
An on-chip state machine controls the program and erase func-  
tions. The embedded byte-program and sector/chip erase functions are  
fully automatic. Data-protection of any sector combination is accom-  
plished using a hardware sector-protection feature.  
The Erase/Resume function allows the sector erase operation to  
read data from, or program to a non-erasing sector, then resume the  
erase operation.  
Device operations are selected by using standard commands into  
the command register using standard microprocessor write timings. The  
command register acts as an input to an internal state machine that  
interprets the commands, controls the erase and programming opera-  
tions, outputs the status of the device, and outputs data stored in the  
device. On initial power-up operation, the device defaults to the read  
mode.  
For more products and information  
please visit our web site at  
www.austinsemiconductor.com  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8F512K32  
Rev. 4.0 6/01  
1

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