5秒后页面跳转
5962-9067101MRA PDF预览

5962-9067101MRA

更新时间: 2024-02-18 18:01:27
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 552K
描述
LVDT Signal Conditioner

5962-9067101MRA 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.8
转换器类型:SIGNAL CONDITIONERJESD-30 代码:R-GDIP-T20
JESD-609代码:e0最大负电源电压:-18 V
最小负电源电压:-12 V标称负供电电压:-15 V
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Qualified
筛选级别:MIL-STD-883最大供电电压:18 V
最小供电电压:12 V标称供电电压:15 V
表面贴装:NO温度等级:MILITARY
端子面层:TIN LEAD端子形式:THROUGH-HOLE
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

5962-9067101MRA 数据手册

 浏览型号5962-9067101MRA的Datasheet PDF文件第6页浏览型号5962-9067101MRA的Datasheet PDF文件第7页浏览型号5962-9067101MRA的Datasheet PDF文件第8页浏览型号5962-9067101MRA的Datasheet PDF文件第10页浏览型号5962-9067101MRA的Datasheet PDF文件第11页浏览型号5962-9067101MRA的Datasheet PDF文件第12页 
AD598  
1000  
100  
10  
10kHz , C  
10kHz , C  
SHUNT = 0nF  
1
SHUNT = 1nF  
10kHz , C  
1
SHUNT = 10nF  
0.1  
0.001  
0.01  
0.1  
10  
C2, C3, C4; C2 = C3 = C4 – µF  
Figure 17. Output Voltage Ripple vs. Filter Capacitance  
Determining LVDT Sensitivity  
LVDT sensitivity can be determined by measuring the LVDT  
secondary voltages as a function of primary drive and core posi-  
tion, and performing a simple computation.  
Energize the LVDT at its recommended primary drive level,  
VPRI (3 V rms for the E100). Set the core to midpoint where  
VA = VB. Set the core displacement to its mechanical full-scale  
position and measure secondary voltages VA and VB.  
Figure 15. Gain and Phase Characteristics vs. Frequency  
(0 kHz–10 kHz)  
VA(at Full Scale ) VB (at Full Scale )  
1000  
100  
10  
Sensitivity =  
VPRI × d  
From Figure 18,  
1.710.99  
3 × 100 mils  
Sensitivity =  
= 2. 4 mV/V/mil  
VSEC  
WHEN V  
PRI = 3V rms  
V
A
1.71V rms  
2.5kHz, C  
= 0nF  
SHUNT  
0.99V rms  
VB  
1
2.5kHz, C  
2.5kHz, C  
= 1nF  
SHUNT  
+
d = 100 mils  
d = –100 mils  
d = 0  
=10nF  
SHUNT  
0.1  
Figure 18. LVDT Secondary Voltage vs. Core Displacement  
0.01  
0.1  
C2, C3, C4; C2 = C3 = C4 – µF  
10  
1
Thermal Shutdown and Loading Considerations  
The AD598 is protected by a thermal overload circuit. If the die  
temperature reaches 165°C, the sine wave excitation amplitude  
gradually reduces, thereby lowering the internal power dissipa-  
tion and temperature.  
Figure 16. Output Voltage Ripple vs. Filter Capacitance  
Due to the ratiometric operation of the decoder circuit, only  
small errors result from the reduction of the excitation ampli-  
tude. Under these conditions the signal-processing section of  
the AD598 continues to meet its output specifications.  
The thermal load depends upon the voltage and current deliv-  
ered to the load as well as the power supply potentials. An  
LVDT Primary will present an inductive load to the sine wave  
excitation. The phase angle between the excitation voltage and  
current must also be considered, further complicating thermal  
calculations.  
REV. A  
–9–  

与5962-9067101MRA相关器件

型号 品牌 获取价格 描述 数据表
5962-9067501M3X TI

获取价格

ALS SERIES, 9-BIT DRIVER, TRUE OUTPUT, CQCC28, CERAMIC, QCC-28
5962-9067501MKA ACTEL

获取价格

Bus Driver, ALS Series, 1-Func, 9-Bit, True Output, TTL, CDFP24, CERAMIC, FP-24
5962-9067501MKX TI

获取价格

ALS SERIES, 9-BIT DRIVER, TRUE OUTPUT, CDFP24, CERAMIC, FP-24
5962-9067501MLA WEDC

获取价格

IC ALS SERIES, 9-BIT DRIVER, TRUE OUTPUT, CDIP24, CERAMIC, DIP-24, Bus Driver/Transceiver
5962-9067501MLX ETC

获取价格

9-Bit D-Type Flip-Flop
5962-9067502M3X ETC

获取价格

9-Bit D-Type Flip-Flop
5962-9067502MKX ETC

获取价格

9-Bit D-Type Flip-Flop
5962-9067502MLX ETC

获取价格

9-Bit D-Type Flip-Flop
5962-9067801MXA ETC

获取价格

16-Bit Microprocessor
5962-9067801MXC INTERSIL

获取价格

High Performance Microprocessor with Memory Management and Protection