AD598
8. C2, C3 and C4 are a function of the desired bandwidth of
the AD598 position measurement subsystem. They should
be nominally equal values.
For no offset adjustment R3 and R4 should be open circuit.
To design a circuit producing a 0 V to +10 V output for a
displacement of ±0.1 inch, set VOUT to +10 V, d = 0.2 inch
and solve Equation (1) for R2.
C2 = C3 = C4 = 10–4 Farad Hz/fSUBSYSTEM (Hz)
If the desired system bandwidth is 250 Hz, then
C2 = C3 = C4 = 10–4 Farad Hz/250 Hz = 0.4 µF
R2 = 37.6 kΩ
This will produce a response shown in Figure 10.
See Figures 13, 14 and 15 for more information about
AD598 bandwidth and phase characterization.
VOUT (VOLTS)
+
5
9. In order to Compute R2, which sets the AD598 gain or full-
scale output range, several pieces of information are needed:
–
+
0.1 d (INCHES)
0.1
a. LVDT sensitivity, S
–
5
b. Full-scale core displacement, d
Figure 10. VOUT (±5 V Full Scale)
vs. Core Displacement (±0.1 Inch)
c. Ratio of manufacturer recommended primary drive level,
V
PRI to (VA + VB) computed in Step 4.
In Equation (2) set VOS = 5 V and solve for R3 and R4.
Since a positive offset is desired, let R4 be open circuit.
LVDT sensitivity is listed in the LVDT manufacturer’s cata-
log and has units of millivolts output per volts input per inch
displacement. The E100 has a sensitivity of 2.4 mV/V/mil.
In the event that LVDT sensitivity is not given by the manu-
facturer, it can be computed. See section on Determining
LVDT Sensitivity.
Rearranging Equation (2) and solving for R3
1. 2 × R 2
R3 =
– 5 kΩ = 4.02 kΩ
V
OS
For a full-scale displacement of d inches, voltage out of the
AD598 is computed as
Figure 11 shows the desired response.
V
(VOLTS)
OUT
VPRI
+
10
VOUT = S ×
× 500 µA × R2 × d.
(V +VB)
A
+
5
–
+
0.1 d (INCHES)
0.1
VOUT is measured with respect to the signal reference,
Pin 17 shown in Figure 7.
Solving for R2,
Figure 11. VOUT (0 V–10 V Full Scale)
vs. Displacement (±0.1 Inch)
VOUT ×(VA +VB )
R2 =
(1)
S ×VPRI × 500 µA × d
Note that VPRI is the same signal level used in Step 4 to
determine (VA + VB).
DESIGN PROCEDURE
SINGLE SUPPLY OPERATION
Figure 12 shows the single supply connection method.
For VOUT = 20 V full-scale range (±10 V) and d = 0.2 inch
full-scale displacement (±0.1 inch),
For single supply operation, repeat Steps 1 through 10 of the
design procedure for dual supply operation, then complete the
additional Steps 11 through 14 below. R5, R6 and C5 are addi-
tional component values to be determined. VOUT is measured
with respect to SIGNAL REFERENCE.
20V × 2. 70 V
2. 4 × 3 × 500 µA × 0.2
R2 =
= 75.3 kΩ
VOUT as a function of displacement for the above example is
shown in Figure 9.
11. Compute a maximum value of R5 and R6 based upon the
relationship
VOUT (VOLTS)
+
10
R5 + R6 ≤ VPS/100 µA
12. The voltage drop across R5 must be greater than
–
+
0.1 d (INCHES)
0.1
1. 2 V
R 4 + 5 k Ω
VOUT
4 × R2
2 +10 kΩ*
+ 250 µA +
Volts
–
10
Therefore
Figure 9. VOUT (±10 V Full Scale)
vs. Core Displacement (±0.1 Inch)
1.2 V
R4+5kΩ
VOUT
4×R2
10. Selections of R3 and R4 permit a positive or negative output
voltage offset adjustment.
2+10 kΩ*
+250 µA +
R5≥
Ohms
100 µA
1
1
*These values have ±20% tolerance.
V
= 1. 2 V × R 2 ×
–
(2)
OS
R 3 + 5 k Ω* R 4 + 5 k Ω*
Based upon the constraints of R5 + R6 (Step 11) and R5
(Step 12), select an interim value of R6.
*These values have a ±20% tolerance.
REV. A
–7–