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5962-8858602XA PDF预览

5962-8858602XA

更新时间: 2024-01-19 02:56:28
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其他 - ETC 控制器
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34页 321K
描述
Controller Miscellaneous - Datasheet Reference

5962-8858602XA 技术参数

生命周期:Active零件包装代码:DFP
包装说明:DFP,针数:82
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.69JESD-30 代码:R-XDFP-F82
长度:55.625 mm端子数量:82
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:UNSPECIFIED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
认证状态:Qualified筛选级别:MIL-PRF-38534 Class H
座面最大高度:4.72 mm最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
宽度:40.64 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

5962-8858602XA 数据手册

 浏览型号5962-8858602XA的Datasheet PDF文件第3页浏览型号5962-8858602XA的Datasheet PDF文件第4页浏览型号5962-8858602XA的Datasheet PDF文件第5页浏览型号5962-8858602XA的Datasheet PDF文件第7页浏览型号5962-8858602XA的Datasheet PDF文件第8页浏览型号5962-8858602XA的Datasheet PDF文件第9页 
TABLE I. Electrical performance characteristics - Continued.  
Test  
Symbol  
Conditions  
Group A  
subgroups  
1/  
Device  
types  
Limits  
Unit  
-55°C T +125°C  
C
unless otherwise specified  
Min  
Max  
200  
Delay Timing - Continued:  
tD13  
VCC = 4.5 V, VIH = 2.5 V,  
VIL = 0.4 V, IOH = -4.0 mA,  
9,10,11  
All  
ns  
RTU, SOM cycle DMA delay  
I
OL = 4.0 mA, fIN = 12 MHz,  
See figures 4 through 20  
7/ 8/  
1553 Command Word setup  
time  
tD14  
tD15  
tD16 9/  
tD17  
9,10,11  
9,10,11  
All  
All  
60  
60  
ns  
ns  
1553 Command Word hold  
time  
9,10,11  
9,10,11  
9,10,11  
9,10,11  
All  
All  
All  
All  
200  
30  
ns  
ns  
ns  
ns  
MT , SOM cycle DMA delay  
CS low to MEMCS low delay  
OE low to MEMOE low delay  
tD18  
30  
tD19  
30  
WR low to MEMWR low  
delay  
tD20  
tD21  
tD22  
tD23  
9,10,11  
9,10,11  
9,10,11  
9,10,11  
All  
All  
All  
All  
25  
45  
ns  
ns  
ns  
ns  
BUSGRNT high delay  
BUSACK low address delay  
25  
BUSACK high address delay  
Address increment delay  
Pulse Width Timing:  
200  
tPW1  
VCC = 4.5 V, VIH = 2.5 V,  
VIL = 0.4 V, IOH = -4.0 mA,  
9,10,11  
All  
70  
ns  
READYD pulse width  
(CPU handshake)  
I
OL = 4.0 mA, fIN = 12 MHz,  
See figures 4 through 20  
8/  
tPW2  
9,10,11  
9,10,11  
All  
All  
70  
70  
ns  
ns  
CPU MEMWR low pulse  
width  
tPW3  
CPU MEMCS low pulse  
width  
tPW4  
tPW5  
9,10,11  
9,10,11  
All  
All  
70  
70  
ns  
ns  
EXTLD low pulse width  
RESET low pulse width  
See footnotes at end of table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-88586  
A
REVISION LEVEL  
SHEET  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
C
6
DSCC FORM 2234  
APR 97  

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