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5962-8755401S2A PDF预览

5962-8755401S2A

更新时间: 2024-11-18 14:48:07
品牌 Logo 应用领域
美国国家半导体 - NSC 驱动输入元件输出元件逻辑集成电路
页数 文件大小 规格书
10页 187K
描述
IC ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CQCC20, CERAMIC, LCC-20, Decoder/Driver

5962-8755401S2A 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:QCCN, LCC20,.35SQReach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.38Is Samacsys:N
其他特性:3 ENABLE INPUTS系列:ACT
JESD-30 代码:S-CQCC-N20JESD-609代码:e0
长度:8.89 mm负载电容(CL):50 pF
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.024 A
功能数量:1端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:INVERTED封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装等效代码:LCC20,.35SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
Prop。Delay @ Nom-Sup:13.5 ns传播延迟(tpd):12.5 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535 Class S
座面最大高度:1.905 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb) - hot dipped端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.89 mm
Base Number Matches:1

5962-8755401S2A 数据手册

 浏览型号5962-8755401S2A的Datasheet PDF文件第2页浏览型号5962-8755401S2A的Datasheet PDF文件第3页浏览型号5962-8755401S2A的Datasheet PDF文件第4页浏览型号5962-8755401S2A的Datasheet PDF文件第5页浏览型号5962-8755401S2A的Datasheet PDF文件第6页浏览型号5962-8755401S2A的Datasheet PDF文件第7页 
August 1998  
54AC138 54ACT138  
1-of-8 Decoder/Demultiplexer  
General Description  
Features  
n ICC reduced by 50%  
The ’AC/’ACT138 is  
a
high-speed 1-of-8 decoder/  
demultiplexer. This device is ideally suited for high-speed bi-  
polar memory chip select address decoding. The multiple in-  
put enables allow parallel expansion to a 1-of-24 decoder  
using just three ’AC/’ACT138 devices or a 1-of-32 decoder  
using four ’AC/’ACT138 devices and one inverter.  
n Demultiplexing capability  
n Multiple input enable for easy expansion  
n Active LOW mutually exclusive outputs  
n Outputs source/sink 24 mA  
n ’ACT138 has TTL-compatible inputs  
n Standard Microcircuit Drawing (SMD)  
— ’AC138: 5962-87622  
— ’ACT138: 5962-87554  
Logic Symbols  
Connection Diagrams  
Pin Assignment  
for DIP and Flatpak  
DS100268-1  
IEEE/IEC  
DS100268-2  
Pin Assignment  
for LCC  
DS100268-7  
Pin Names  
A0–A2  
E1–E2  
E3  
Description  
Address Inputs  
Enable Inputs  
Enable Input  
Outputs  
DS100268-3  
O0–O7  
FACT® is a registered trademark of Fairchild Semiconductor Corporation.  
© 1998 National Semiconductor Corporation  
DS100268  
www.national.com  

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