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5962-0924001VXC PDF预览

5962-0924001VXC

更新时间: 2024-02-28 01:44:39
品牌 Logo 应用领域
德州仪器 - TI 转换器模数转换器
页数 文件大小 规格书
46页 1034K
描述
12-Bit, 1-GSPS Analog-to-Digital Converter

5962-0924001VXC 技术参数

生命周期:Active零件包装代码:QFP
包装说明:QFP-100针数:100
Reach Compliance Code:not_compliantECCN代码:3A001.A.2.C
HTS代码:8542.39.00.01风险等级:5.44
Is Samacsys:N最小模拟输入电压:-2 V
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-CQFP-F100
长度:19.05 mm最大线性误差 (EL):0.1099%
模拟输入通道数量:1位数:12
功能数量:1端子数量:100
最高工作温度:125 °C最低工作温度:-55 °C
输出位码:OFFSET BINARY, 2'S COMPLEMENT BINARY输出格式:PARALLEL, WORD
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:HGQFF
封装等效代码:TPAK100,2.0SQ,20封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, GUARD RING峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3,5 V认证状态:Qualified
采样速率:1000 MHz采样并保持/跟踪并保持:TRACK
筛选级别:MIL-STD-883 Class V座面最大高度:3.15 mm
子类别:Analog to Digital Converters最大压摆率:255 mA
标称供电电压:3.3 V表面贴装:YES
技术:BIPOLAR温度等级:MILITARY
端子形式:FLAT端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:19.05 mmBase Number Matches:1

5962-0924001VXC 数据手册

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ADS5400-SP  
www.ti.com  
SLAS669C SEPTEMBER 2010REVISED AUGUST 2012  
DEFINITION OF SPECIFICATIONS  
Analog Bandwidth  
The analog input frequency at which the power of the fundamental is reduced by 3 dB with respect to the low-  
frequency value  
Aperture Delay  
The delay in time between the rising edge of the input sampling clock and the actual time at which the sampling  
occurs  
Aperture Uncertainty (Jitter)  
The sample-to-sample variation in aperture delay  
Clock Pulse Duration/Duty Cycle  
The duty cycle of a clock signal is the ratio of the time the clock signal remains at a logic high (clock pulse  
duration) to the period of the clock signal, expressed as a percentage.  
Differential Nonlinearity (DNL)  
An ideal ADC exhibits code transitions at analog input values spaced exactly 1 LSB apart. DNL is the deviation  
of any single step from this ideal value, measured in units of LSB.  
Common-Mode Rejection Ratio (CMRR)  
CMRR measures the ability to reject signals that are presented to both analog inputs simultaneously. The  
injected common-mode frequency level is translated into dBFS, the spur in the output FFT is measured in dBFS,  
and the difference is the CMRR in dB.  
Effective Number of Bits (ENOB)  
ENOB is a measure in units of bits of a converter's performance as compared to the theoretical limit based on  
quantization noise  
ENOB = (SINAD – 1.76)/6.02  
(3)  
Gain Error  
Gain error is the deviation of the ADC actual input full-scale range from its ideal value, given as a percentage of  
the ideal input full-scale range.  
Integral Nonlinearity (INL)  
INL is the deviation of the ADC transfer function from a best-fit line determined by a least-squares curve fit of that  
transfer function. The INL at each analog input value is the difference between the actual transfer function and  
this best-fit line, measured in units of LSB.  
Offset Error  
Offset error is the deviation of output code from mid-code when both inputs are tied to common-mode.  
Power-Supply Rejection Ratio (PSRR)  
PSRR is a measure of the ability to reject frequencies present on the power supply. The injected frequency level  
is translated into dBFS, the spur in the output FFT is measured in dBFS, and the difference is the PSRR in dB.  
The measurement calibrates out the benefit of the board supply decoupling capacitors.  
Signal-to-Noise Ratio (SNR)  
SNR is the ratio of the power of the fundamental (PS) to the noise floor power (PN), excluding the power at dc  
and in the first five harmonics.  
P
10  
P
S
SNR + 10log  
N
(4)  
SNR is either given in units of dBc (dB to carrier) when the absolute power of the fundamental is used as the  
reference, or dBFS (dB to full scale) when the power of the fundamental is extrapolated to the converter’s full-  
scale range.  
Copyright © 2010–2012, Texas Instruments Incorporated  
41  
Product Folder Links: ADS5400-SP  

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