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5962-01A1701VXC PDF预览

5962-01A1701VXC

更新时间： 2024-11-24 21:55:43
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输时钟
页数 文件大小 规格书
31页 285K
描述
Tripple Point to Point IEEE 1355 High Speed Controller

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中文翻译

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5962-01A1701VXC 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：QFP,针数：196
Reach Compliance Code：compliantHTS代码：8542.31.00.01
风险等级：5.8Is Samacsys：N
地址总线宽度：8边界扫描：YES
最大时钟频率：25 MHz最大数据传输速率：25 MBps
外部数据总线宽度：32JESD-30 代码：S-PQFP-G196
JESD-609代码：e0低功率模式：NO
串行 I/O 数：3端子数量：196
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装形状：SQUARE封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
筛选级别：MIL-PRF-38535 Class V座面最大高度：2.95 mm
最大供电电压：5.5 V最小供电电压：4.5 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.635 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIEDuPs/uCs/外围集成电路类型：SERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Base Number Matches：1

5962-01A1701VXC 数据手册

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Features  
• 3 identical bidirectional link channels allowing full duplex communication under  
selectable transmit rate from 1.25 up to 200 Mbit/s in each direction  
• A COmmunication Memory Interface (COMI) provides autonomous accesses to a  
communication memory which are controlled by an arbitration unit, allowing two  
TSS901E to share one Dual Port Ram without external arbitration  
• The scalable databus width (8/16/32 bit) allows flexible integration with any CPU type  
• Little or big endian mode is configurable  
• AHOst Control Interface (HOCI) gives read/write accesses to the TSS901E  
configuration registers and to the DS-link channels for the controlling CPU  
• Device control via one of the three links allows its use in systems without a local  
controller  
• Link disconnect detection and parity check at token (data and control) level; possible  
checksum generation for packet level check  
• Power saving mode relying on automatic transmit rate reduction  
• Auser’s manual of the TSS901E (also called SMCS332) is available at:  
http://www.omimo.be/companies/dasa_000.htm  
Tripple Point to  
Point IEEE 1355  
High Speed  
• Designed on Atmel MG1140E matrix and packaged into MQFPL196  
Controller  
Description and Applications  
The TSS901E provides an interface between a Data-Strobe link - according to the  
IEEE Std 1355-1995 specification carrying a simple interprocessor communication  
protocol - and a data processing node consisting of a CPU and a communication and  
data memory.  
TSS901E  
The TSS901E offers hardware supported execution of the major parts of the interpro-  
cessor communication protocol: data transfer between two nodes of a multi-processor  
system is performed with minimal host CPU intervention. The TSS901E can execute  
simple commands to provide basic features for system control functions; a provision of  
fault tolerant features exists as well.  
Although the TSS901E initial exploitation is for use in multi-processor systems where  
the high speed links standardisation is an important issue and where reliability is a  
requirement, it could be used in applications such as heterogeneous systems or mod-  
ules without any communication feature like special image compression chips, some  
signal processors, application specific programmable logic or mass memory.  
The TSS901E may also be used in single board systems where standardised high  
speed interfaces are needed and systems containing "non-intelligent" modules such  
as A/D-converter or sensor interfaces which can be assembled with the TSS901E  
thanks to the "control by link" feature.  
Rev. C – 24-Aug-01  
1
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