Datasheet > 5962-01A1801VZC

5962-01A1801VZC

更新时间： 2024-11-25 06:30:23

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
17页	157K
描述
16-Bit Flow-Through EDAC Error Detection And Correction unit

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5962-01A1801VZC 数据手册

29C516E

16–Bit Flow–Through EDAC

Error Detection And Correction unit

1. Introduction

The 29C516E Atmel EDAC is a very low power

the corrupted data is placed on the output port and the

flow–through 16–bit Error Detection And Correction unit Uncorrectable Error Flag is set. Note that when there is

(EDAC) with two user data buses. The EDAC is used in more than two errors, then some bit patterns may appear

a high integrity system for monitoring and correction of as possible correctable errors. Therefore, if the

data values coming from the memory space. During a environment produces this type of error, the EDAC must

processor write cycle, at each memory location (16–bit be used in detect and provide no automatic correction.

width), EDAC calculated checkword (6 or 8–bit width) is Data and syndrome analysis must be done.

added. When performing a read operation from memory,

the 29C516E verifies the entire checkword and data

The 29C516E acts as a data buffer for µP–memory

interfacing. A flow–through EDAC is placed in the data

combination. It detects and can correct 100% of all the

bus path, between the processor and the memory to be

single–bit errors and it detects all double–bit errors.

protected. This component is able to serve two different

When the 29C516E uses 6–checkbit, it can detect any

users of one memory space. So, it forms the interface

error on any single 4–bit memory chip. The 8–check–bit

between the 22/24–bit (16+6/16+8) memory data bus and

option gives the additional capability to detect all errors

the two 16–bit processor data busses with a high drive

on any single 8–bit memory chip. All the errors are

capability (–12.8 mA). The two data ports can be used to

signaled to the master system (via 2 error Flags) in order

create a dual port bus in front of memory space. The

User–1(2) can transfer data from/to the memory or

to allow the processor to make the required action.

The 29C516E operates in two possible modes: corrected

or detected mode. In the corrected mode, the single–bit in

error is complemented (corrected). Then, the available

entire data is placed on the output port and the Correctable

Error Flag is set. In case of double–bit errors (or more),

from/to the User–2(1), by–passing the memory. During

read or write memory cycles processed by the User–1(2),

the User–2(1) have the possibility to listen the

transferred data.

2. Features

D Very Low Power CMOS

D Correctable and Uncorrectable Error Flags

D Two User Data Buses

D 16–Bit operation with 6 or 8 Check Bits

D Fast Error Detection : 31 ns (max.)

D Fast Error Correction : 32 ns (max.)

D Corrects all Single–Bit Errors

D User to User Transfer and Listening operation

D High Drive Capability on Buses : –12.8 mA

D TTL Compatible

D Detects all Double–Bit Errors

D Single 5V ±10% Power Supply

D 100 Pin Multilayer Quad Flat Pack

(Flat leaded or L leaded).

D Detects some Multi–Bit Errors

D Detects Chip Errors (x1, x4 & x8 RAM Format)

Atmel Corporation

Rev. E (03 2007)

12 3 4 5 6 7...17

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与5962-01A1801VZC相关器件

型号	品牌	获取价格	描述	数据表
5962-01B0101V5B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-349
5962-01B0102V5B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-349
5962-01B0103Q6B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-472
5962-01B0103V6B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-472
5962-01B0104Q6B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-472
5962-01B0105V5B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-349
5962-01B0106Q5B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-349
5962-01B0106Q6B	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-472
5962-01B0107QTB	ACTEL	获取价格	Field Programmable Gate Array, CMOS, CGA-472
5962-0250101QXC	ATMEL	获取价格	128K X 8 STANDARD SRAM, 40 ns, DFP32, 0.400 INCH, DFP-32

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