Datasheet > 5881

5881

更新时间： 2024-11-08 22:17:39

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动器
页数	文件大小	规格书
4页	81K
描述
BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK

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5881 数据手册

5881

BiMOS II DUAL

8-BIT LATCHED DRIVER

5881

BiMOS II DUAL 8-BIT LATCHED

DRIVER WITH READ BACK

With 16 CMOS data latches (two sets of eight), CMOS control

circuitry for each set of latches, and a bipolar saturated driver for each

latch, the UCN5881EP provides low-power interface with maximum

flexibility. The driver includes thermal shutdown circuitry to protect

against damage from high junction temperatures and clamp diodes

for inductive load transient suppression.

The CMOS inputs cause minimal circuit loading and are compat-

ible with standard CMOS, PMOS, and NMOS circuits. TTL or DTL

circuits may require the use of appropriate pull up resistors. When

reading back, each data input will sink 8 mA (if its corresponding latch

is low) or source 400 µA (if its corresponding latch is high). The read

back feature is for error checking. It allows the system to verify that

data has been received and latched.

The bipolar outputs are suitable for use with low-power relays,

solenoids, and stepping motors. The very-low output saturation

voltage makes this device well-suited for driving LED arrays. The

output transistors are capable of sinking 50 mA and will maintain at

least 20 V in the OFF state. Outputs may be paralleled for higher

current capability.

Dwg. No. A-14,225

The UCN5881EP dual 8-bit latched sink driver is rated for opera-

tion over the temperature range of -20°C to +85°C and is supplied in a

plastic 44-lead chip carrier conforming to the JEDEC MS-007AB

outline.

FEATURES

ABSOLUTE MAXIMUM RATINGS

■ 4.4 MHz Minimum Data-Input Rate

■ Low-Power CMOS Logic

■ 20 V, 50 mA (Max.) Outputs

■ Transient-Protected Outputs

■ Thermal Shutdown Protection

■ Low-Profile Leaded Chip Carrier

Output Voltage, V_OUT. . . . . . . . . . . . . . 20 V

Output Sustaining Voltage, V_CE(sus). . . 15 V

Output Current, I_OUT. . . . . . . . . . . . 50 mA

Input Voltage Range,

V_IN. . . . . . . . . . . -0.3 V to V_DD+ 0.3 V

Logic Supply Voltage, V_DD. . . . . . . . . . 15 V

Package Power Dissipation,

P_D. . . . . . . . . . . . . . . . . . . See Graph

Operating Temperature Range,

T_A. . . . . . . . . . . . . . . . -20°C to +85°C

Storage Temperature Range,

T_S. . . . . . . . . . . . . . . -55°C to +150°C

Caution: CMOS devices have input static

protection, but are susceptible to damage when

exposed to extremely high static electrical

charges.

Always order by complete part number: UCN5881EP .

12 3 4

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