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570ABB000372DGR PDF预览

570ABB000372DGR

更新时间: 2024-11-08 23:47:39
品牌 Logo 应用领域
芯科 - SILICON 石英晶振
页数 文件大小 规格书
36页 2309K
描述
ANY, I2C PROGRAMMABLE XO

570ABB000372DGR 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LCC8,.2X.28,100Reach Compliance Code:compliant
风险等级:5.57安装特点:SURFACE MOUNT
端子数量:8最大工作频率:810 MHz
最小工作频率:10 MHz标称工作频率:810 MHz
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:CERAMIC封装等效代码:LCC8,.2X.28,100
电源:3.3 V认证状态:Not Qualified
子类别:Other Oscillators最大压摆率:130 mA
标称供电电压:3.3 V表面贴装:YES

570ABB000372DGR 数据手册

 浏览型号570ABB000372DGR的Datasheet PDF文件第2页浏览型号570ABB000372DGR的Datasheet PDF文件第3页浏览型号570ABB000372DGR的Datasheet PDF文件第4页浏览型号570ABB000372DGR的Datasheet PDF文件第5页浏览型号570ABB000372DGR的Datasheet PDF文件第6页浏览型号570ABB000372DGR的Datasheet PDF文件第7页 
Si570/Si571  
10 MHZ TO 1.4 GHZ I2C PROGRAMMABLE XO/VCXO  
Features  
Any programmable output  
frequencies from 10 to 945 MHz and  
select frequencies to 1.4 GHz  
Internal fixed crystal frequency  
ensures high reliability and low  
aging  
Available LVPECL, CMOS,  
LVDS, and CML outputs  
Industry-standard 5x7 mm  
package  
Pb-free/RoHS-compliant  
1.8, 2.5, or 3.3 V supply  
I2C serial interface  
3rd generation DSPLL® with superior  
jitter performance  
3x better frequency stability than  
SAW-based oscillators  
Applications  
Ordering Information:  
SONET/SDH  
xDSL  
10 GbE LAN/WAN  
ATE  
High performance  
instrumentation  
Low-jitter clock generation  
Optical modules  
Clock and data recovery  
See page 31.  
Pin Assignments:  
See page 30.  
Description  
(Top View)  
The Si570 XO/Si571 VCXO utilizes Skyworks Solutions’ advanced DSPLL®  
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-  
programmable to any output frequency from 10 to 945 MHz and select frequencies  
to 1400 MHz with <1 ppb resolution. The device is programmed via an I2C serial  
interface. Unlike traditional XO/VCXOs where a different crystal is required for  
each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL  
clock synthesis IC to provide any-frequency operation. This IC-based approach  
allows the crystal resonator to provide exceptional frequency stability and  
reliability. In addition, DSPLL clock synthesis provides superior supply noise  
rejection, simplifying the task of generating low-jitter clocks in noisy environments  
typically found in communication systems.  
SDA  
7
NC  
VDD  
1
2
3
6
5
4
OE  
CLK–  
CLK+  
GND  
8
SCL  
Functional Block Diagram  
Si570  
CLK- CLK+  
VDD  
SDA  
7
OE  
VC  
VDD  
1
2
3
6
5
4
10-1400 MHz  
DSPLLClock  
Synthesis  
Fixed  
Frequency  
XO  
SDA  
SCL  
OE  
CLK–  
CLK+  
Si571 only  
GND  
ADC  
8
SCL  
GND  
Si571  
VC  
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com  
Rev. 1.6 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • November 15, 2021  

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