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54LS352DMQB PDF预览

54LS352DMQB

更新时间: 2024-11-30 22:53:07
品牌 Logo 应用领域
美国国家半导体 - NSC 复用器逻辑集成电路
页数 文件大小 规格书
6页 131K
描述
Dual 4-Line to 1-Line Data Selectors/Multiplexers

54LS352DMQB 数据手册

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June 1989  
54LS352/DM74LS352 Dual 4-Line to  
1-Line Data Selectors/Multiplexers  
General Description  
Y
Performs parallel-to-serial conversion  
Each of these data selectors/multiplexers contains invert-  
ers and drivers to supply fully complementary, on-chip, bi-  
nary decoding data selection to the AND-OR-invert gates.  
Separate strobe inputs are provided for each of the two  
four-line sections.  
Y
Strobe (enable) line provided for cascading (N lines to  
n lines)  
Y
Y
High fan-out, low-impedance, totem-pole outputs  
Typical average propagation delay times  
From data 15 ns  
From strobe 19 ns  
From select 22 ns  
Features  
Y
Inverting version of DM54/74LS153  
Y
Permits multiplexing from N lines to 1 line  
Y
Typical power dissipation 31 mW  
Connection Diagram  
Function Table  
Select  
Dual-In-Line Package  
Data Inputs  
Strobe  
G
Output  
Y
Inputs  
B
A
C0  
C1  
C2  
C3  
X
L
X
L
X
L
X
X
X
L
X
X
X
X
X
L
X
X
X
X
X
X
X
L
H
L
L
L
L
L
L
L
L
H
H
L
L
L
H
X
X
X
X
X
X
L
H
H
L
H
L
L
H
X
X
X
X
H
H
H
H
H
L
L
H
X
X
H
H
H
L
H
Select inputs A and B are common to both sections.  
e
e
e
Low Level, X Don’t Care  
H
High Level, L  
TL/F/6425–1  
Order Number 54LS352DMQB, 54LS352FMQB,  
DM74LS352M or DM74LS352N  
See NS Package Number J16A, M16A, N16E or W16A  
C
1995 National Semiconductor Corporation  
TL/F/6425  
RRD-B30M105/Printed in U. S. A.  

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