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54LS173FMQB PDF预览

54LS173FMQB

更新时间： 2024-11-11 20:31:31
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路触发器
页数 文件大小 规格书
8页 157K
描述
LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP16, CERAMIC, FP-16

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54LS173FMQB 技术参数

生命周期：Obsolete包装说明：DFP, FL16,.3
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.58其他特性：WITH HOLD MODE; WITH DUAL OUTPUT ENABLE
系列：LSJESD-30 代码：R-GDFP-F16
长度：9.6645 mm负载电容（CL）：50 pF
逻辑集成电路类型：D FLIP-FLOP最大频率@ Nom-Sup：30000000 Hz
最大I（ol）：0.012 A位数：4
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装等效代码：FL16,.3封装形状：RECTANGULAR
封装形式：FLATPACK电源：5 V
最大电源电流（ICC）：30 mA传播延迟（tpd）：28 ns
认证状态：Not Qualified筛选级别：38535Q/M;38534H;883B
座面最大高度：2.032 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：TTL温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：6.604 mm最小 fmax：30 MHz
Base Number Matches：1

54LS173FMQB 数据手册

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May 1992  
54LS173/DM74LS173A  
TRI-STATE 4-Bit D-Type Register  
É
General Description  
This four-bit register contains D-type flip-flops with totem-  
pole TRI-STATE outputs, capable of driving highly capaci-  
tive or low-impedance loads. The high-impedance state and  
increased high-logic-level drive provide these flip-flops with  
the capability of driving the bus lines in a bus-organized sys-  
tem without need for interface or pull-up components.  
To minimize the possibility that two outputs will attempt to  
take a common bus to opposite logic levels, the output con-  
trol circuitry is designed so that the average output disable  
times are shorter than the average output enable times.  
É
Features  
Y
Gated enable inputs are provided for controlling the entry of  
data into the flip-flops. When both data-enable inputs are  
low, data at the D inputs are loaded into their respective flip-  
flops on the next positive transition of the buffered clock  
input. Gate output control inputs are also provided. When  
both are low, the normal logic states of the four outputs are  
available for driving the loads or bus lines. The outputs are  
disabled independently from the level of the clock by a high  
logic level at either output control input. The outputs then  
present a high impedance and neither load nor drive the bus  
line. Detailed operation is given in the truth table.  
TRI-STATE outputs interface directly with system bus  
Y
Gated output control lines for enabling or disabling the  
outputs  
Y
Fully independent clock eliminates restrictions for oper-  
ating in one of two modes:  
Parallel load  
Do nothing (hold)  
Y
For application as bus buffer registers  
Connection Diagram  
Function Table  
Dual-In-Line Package  
Inputs  
Data  
Output  
Q
Clear  
Clock  
Enable  
Data  
D
G1  
G2  
H
L
L
L
L
L
X
X
X
H
X
L
X
X
X
H
L
X
X
X
X
L
L
L
Q
0
Q
0
Q
0
u
u
u
u
L
L
L
H
H
When either M or N (or both) is (are) high the output is  
disabled to the high-impedance state; however,  
sequential operation of the flip-flops is not affected.  
e
e
H
L
High Level (Steady State)  
Low Level (Steady State)  
TL/F/6403–1  
Order Number 54LS173DMQB, 54LS173FMQB,  
54LS173LMQB, DM74LS173AM or DM74LS173AN  
See NS Package Number E20A, J16A,  
e
Low-to-High Level Transition  
u
e
X
Don’t Care (Any Input Including Transitions)  
e
Were Established.  
Q
0
The Level of Q Before the Indicated Steady State Input Conditions  
M16A, N16E or W16A  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/6403  
RRD-B30M105/Printed in U. S. A.  
12345678

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与54LS173FMQB相关器件

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54LS173L1MQB FAIRCHILD

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 		Jbar-Kbar Flip-Flop, 4-Func, Positive Edge Triggered, TTL, CQCC20,
54LS173LMQB NSC

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 		TRI-STATE 4-BIT D-TYPE REGISTER
54LS173LMQB TI

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 		LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20, CC-20
54LS173M/B2AJC MOTOROLA

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 		LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CQCC20, CERAMIC, LCC-20
54LS174 NSC

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 		Hex/Quad D Flip-Flops with Clear
54LS174/B2A YAGEO

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 		D Flip-Flop, LS Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, CQCC20,
54LS174/B2AJC MOTOROLA

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 		D Flip-Flop, LS Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, CQCC20,
54LS174/BEA PHILIPS

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 		D Flip-Flop, 6-Func, Positive Edge Triggered, TTL, CDIP16
54LS174/BFA YAGEO

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 		D Flip-Flop, LS Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, CDFP16,
54LS174/BFAJC MOTOROLA

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 		LS SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDFP16, CERAMIC, FP-16

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