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54LS155DMQB

更新时间： 2024-11-07 22:34:39
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美国国家半导体 - NSC 解码器解复用器逻辑集成电路输出元件驱动
页数 文件大小 规格书
8页 163K
描述
Dual 2-Line to 4-Line Decoders/Demultiplexers

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中文翻译

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54LS155DMQB 数据手册

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June 1989  
54LS155/DM54LS155/DM74LS155,  
54LS156/DM54LS156/DM74LS156  
Dual 2-Line to 4-Line Decoders/Demultiplexers  
Features  
General Description  
Y
Applications:  
These TTL circuits feature dual 1-line-to-4-line demultiplex-  
ers with individual strobes and common binary-address in-  
puts in a single 16-pin package. When both sections are  
enabled by the strobes, the common address inputs se-  
quentially select and route associated input data to the ap-  
propriate output of each section. The individual strobes per-  
mit activating or inhibiting each of the 4-bit sections as de-  
sired. Data applied to input C1 is inverted at its outputs and  
data applied at C2 is true through its outputs. The inverter  
following the C1 data input permits use as a 3-to-8-line de-  
coder, or 1-to-8-line demultiplexer, without external gating.  
Input clamping diodes are provided on these circuits to mini-  
mize transmission-line effects and simplify system design.  
Dual 2-to-4-line decoder  
Dual 1-to-4-line demultiplexer  
3-to-8-line decoder  
1-to-8-line demultiplexer  
Y
Individual strobes simplify cascading for decoding or  
demultiplexing larger words  
Y
Y
Input clamping diodes simplify system design  
Choice of outputs:  
Totem-pole (LS155)  
Open-collector (LS156)  
Y
Alternate Military/Aerospace device (54LS155/156) is  
available. Contact a National Semiconductor Sales Of-  
fice/Distributor for specifications.  
Connection Diagram and Function Tables  
Dual-In-Line Package  
Order Number 54LS155DMQB, 54LS155FMQB,  
54LS155LMQB, DM54LS155J, DM54LS155W,  
DM74LS155M, DM74LS155N, 54LS156DMQB,  
54LS156FMQB, DM54LS156J, DM54LS156W,  
DM74LS156M or DM74LS156N  
See NS Package Number E20A, J16A,  
M16A, N16E or W16A  
2-Line-to-4-Line Decoder or  
1-Line-to-4-Line Demultiplexer  
Inputs  
Strobe  
G1  
Outputs  
Select  
Data  
C1  
B
A
1Y0  
1Y1  
1Y2  
1Y3  
X
L
L
H
H
X
X
L
H
L
H
L
L
L
L
X
X
H
H
H
H
L
H
L
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
H
L
TL/F/6395–1  
H
X
H
H
3-Line-to-8-Line Decoder or  
1-Line-to-8-Line Demultiplexer  
H
Inputs  
Outputs  
Inputs  
Strobe  
G2  
Outputs  
Strobe  
Or Data  
Select  
Data  
C2  
Select  
(0) (1) (2) (3) (4) (5) (6) (7)  
2Y0 2Y1 2Y2 2Y3 1Y0 1Y1 1Y2 1Y3  
B
A
2Y0  
2Y1  
2Y2  
2Y3  
²
³
G
C
B A  
X
L
X
L
H
L
L
L
L
X
X
L
L
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
L
X
L
L
L
L
H
H
H
H
X X  
L
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
H
L
L H  
H L  
H H  
H
H
H
H
H
H
H
H
H
X
H
X
H
H
H
L
L
L H  
H L  
H H  
e
²
³
C
inputs C1 and C2 connected together  
inputs G1 and G2 connected together  
H
H
e
G
H
e
e
e
low level, X don’t care  
H
high level, L  
C
1995 National Semiconductor Corporation  
TL/F/6395  
RRD-B30M105/Printed in U. S. A.  
12345678

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