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54LS138 PDF预览

54LS138

更新时间: 2024-10-27 22:45:31
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 解码器解复用器
页数 文件大小 规格书
5页 188K
描述
1-OF-8 DECODER/ DEMULTIPLEXER

54LS138 数据手册

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SN54/74LS138  
1-OF-8 DECODER/  
DEMULTIPLEXER  
The LSTTL/MSI SN54/74LS138 is a high speed 1-of-8 Decoder/  
Demultiplexer. This device is ideally suited for high speed bipolar memory  
chip select address decoding. The multiple input enables allow parallel ex-  
pansion to a 1-of-24 decoder using just three LS138 devices or to a 1-of-32  
decoder using four LS138s and one inverter. The LS138 is fabricated with the  
Schottky barrier diode process for high speed and is completely compatible  
with all Motorola TTL families.  
1-OF-8 DECODER/  
DEMULTIPLEXER  
LOW POWER SCHOTTKY  
Demultiplexing Capability  
Multiple Input Enable for Easy Expansion  
Typical Power Dissipation of 32 mW  
Active Low Mutually Exclusive Outputs  
Input Clamp Diodes Limit High Speed Termination Effects  
J SUFFIX  
CERAMIC  
CONNECTION DIAGRAM DIP (TOP VIEW)  
CASE 620-09  
16  
1
NOTE:  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
N SUFFIX  
PLASTIC  
CASE 648-08  
16  
1
D SUFFIX  
SOIC  
CASE 751B-03  
PIN NAMES  
LOADING (Note a)  
16  
HIGH  
LOW  
1
A A  
Address Inputs  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0
2
E , E  
Enable (Active LOW) Inputs  
Enable (Active HIGH) Input  
Active LOW Outputs (Note b)  
1
2
E
3
ORDERING INFORMATION  
O O  
5 (2.5) U.L.  
0
7
SN54LSXXXJ Ceramic  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
NOTES:  
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
Temperature Ranges.  
LOGIC DIAGRAM  
LOGIC SYMBOL  
FAST AND LS TTL DATA  
5-230  

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