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54F407SDM PDF预览

54F407SDM

更新时间: 2024-11-07 07:56:39
品牌 Logo 应用领域
美国国家半导体 - NSC 外围集成电路
页数 文件大小 规格书
10页 161K
描述
DATA ACCESS REGISTER

54F407SDM 数据手册

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December 1994  
54F407  
Data Access Register  
General Description  
Features  
Y
High-speedÐgreater than  
rate  
a
30 MHz microinstruction  
The ’F407 Data Access Register (DAR) performs memory  
address arithmetic for RAM resident stack applications. It  
contains three 4-bit registers intended for Program Counter  
(R ), Stack Pointer (R ), and Operand Address (R ). The  
Y
Three 4-bit registers  
Y
16 instructions for register manipulation  
Two separate output ports, one transparent  
Relative addressing capability  
TRI-STATE Outputs  
0
1
2
’F407 implements 16 instructions which allow either pre- or  
post-decrement/increment and register-to-register transfer  
in a single clock cycle. It is expandable in 4-bit increments  
and can operate at a 30 MHz microinstruction rate on a  
Y
Y
Y
Y
Y
Y
Y
Optional pre- or post- arithmetic  
Expandable in multiples of four bits  
24-pin slim package  
16-bit word. The TRI-STATE outputs are provided for bus-  
É
oriented applications. The ’F407 is fully compatible with all  
TTL families.  
9407 replacement  
Package  
Military  
Number  
Package Description  
54F407DM (Note 1)  
54F407SDM (Note 1)  
54F407FM (Note 1)  
54F407FM (Note 1)  
J24A  
J24F  
W24C  
E28A  
24-Lead Ceramic Dual-In-Line  
24-Lead (0.300 Wide) Ceramic Dual-In-Line  
×
24-Lead Cerpack  
28-Lead Ceramic Leadless Chip Carrier, Type C  
e
Note 1: Military grade device with environmental and burn-in processing. Use suffix  
DMQB, FMQB and LMQB.  
Logic Symbol  
Connection Diagrams  
Pin Assignment  
for DIP and Flatpak  
Pin Assignment  
for LCC  
TL/F/9537–3  
TL/F/9537–2  
TL/F/9537–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9537  
RRD-B30M105/Printed in U. S. A.  

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