Datasheet > 54ACTQ544FMX

54ACTQ544FMX

更新时间： 2024-02-05 14:09:36

品牌	Logo	应用领域
德州仪器 - TI		输出元件逻辑集成电路
页数	文件大小	规格书
12页	198K
描述
ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP24, CERAMIC, FP-24

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

54ACTQ544FMX 技术参数

生命周期：	Obsolete	包装说明：	DFP,
Reach Compliance Code：	unknown	风险等级：	5.84
其他特性：	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	系列：	ACT
JESD-30 代码：	R-GDFP-F24	长度：	15.4305 mm
逻辑集成电路类型：	REGISTERED BUS TRANSCEIVER	位数：	8
功能数量：	1	端口数量：	2
端子数量：	24	最高工作温度：	125 °C
最低工作温度：	-55 °C	输出特性：	3-STATE
输出极性：	INVERTED	封装主体材料：	CERAMIC, GLASS-SEALED
封装代码：	DFP	封装形状：	RECTANGULAR
封装形式：	FLATPACK	传播延迟（tpd）：	11 ns
认证状态：	Not Qualified	座面最大高度：	2.286 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子形式：	FLAT	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

54ACTQ544FMX 数据手册

March 1993

74ACQ544 54ACTQ/74ACTQ544

Quiet Series Octal Registered Transceiver with

TRI-STATE Outputs

General Description

The ’ACQ/’ACTQ544 is an inverting octal transceiver con-

taining two sets of D-type registers for temporary storage of

data flowing in either direction. Separate Latch Enable and

Output Enable inputs are provided for each register to per-

mit independent input and output control in either direction

of data flow. The ’544 inverts data in both directions.

Features

Guaranteed simultaneous switching noise level and

dynamic threshold performance

Guaranteed pin-to-pin skew AC performance

8-bit inverting octal latched transceiver

Separate controls for data flow in each direction

Back-to-back registers for storage

Outputs source/sink 24 mA

The ’ACQ/’ACTQ utilizes NSC Quiet Series technology to

guarantee quiet output switching and improved dynamic

threshold performance. FACT Quiet Series^TMfeatures

GTO^TMoutput control and undershoot corrector in addition

to a split ground bus for superior performance.

4 kV minimum ESD immunity

300 mil slim PDIP/SOIC

Standard Military Drawing 5962-9219301

Logic Symbols

Connection Diagrams

Pin Assignment for

DIP, SOIC and Flatpak

Pin Assignment

for LCC

TL/F/10685–1

TL/F/10685–3

IEEE/IEC

TL/F/10685–2

TL/F/10685–4

FASTÉ and TRI-STATEÉ are registered trademarks of National Semiconductor Corporation.

FACT^TM, FACT Quiet Series^TMand GTO^TMare trademarks of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/10685

RRD-B30M75/Printed in U. S. A.

12 3 4 5 6 7...12

下载PDF

与54ACTQ544FMX相关器件

型号	品牌	描述	获取价格	数据表
54ACTQ544L	NSC	Quiet Series Octal Registered Transceiver with TRI-STATE Outputs	获取价格
54ACTQ544LM	TI	ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28, CERAMIC, LCC-28	获取价格
54ACTQ544LMBQ	ETC	Single 8-Bit Inverting Bus Transceiver	获取价格
54ACTQ544LMQB	TI	ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28, CERAMIC, LCC-28	获取价格
54ACTQ544LMX	TI	ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CQCC28, CERAMIC, LCC-28	获取价格
54ACTQ544SDMBQ	ETC	Single 8-Bit Inverting Bus Transceiver	获取价格