Datasheet > 532AA000035BG

532AA000035BG

更新时间： 2024-11-11 14:10:39

品牌	Logo	应用领域
芯科 - SILICON		机械振荡器
页数	文件大小	规格书
33页	2069K
描述
LVPECL Output Clock Oscillator, 780MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

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532AA000035BG 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.7	Is Samacsys：	N
其他特性：	IT CAN ALSO OPERATE AT 200.0 MHZ	最长下降时间：	0.35 ns
频率调整-机械：	NO	频率稳定性：	50%
JESD-609代码：	e4	安装特点：	SURFACE MOUNT
标称工作频率：	780 MHz	最高工作温度：	85 °C
最低工作温度：	-40 °C	振荡器类型：	LVPECL
物理尺寸：	177.8mm x 127.0mm x 41.91mm	最长上升时间：	0.35 ns
最大供电电压：	3.63 V	最小供电电压：	2.97 V
标称供电电压：	3.3 V	表面贴装：	YES
最大对称度：	55/45 %	端子面层：	Nickel/Gold (Ni/Au)
Base Number Matches：	1

532AA000035BG 数据手册

Si532

DUAL FREQUENCY CRYSTAL OSCILLATOR (XO)

(10 MHZ TO 1.4 GHZ)

Features

Si5602

ꢀ

Available with any-rate output

ꢀ

Internal fixed crystal frequency

ensures high reliability and low

aging

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

ꢀ

Two selectable output frequencies ꢀ Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

3rd generation DSPLL with superior

ꢀ

jitter performance

ꢀ

3x better frequency stability than

SAW-based oscillators

ꢀ

Pb-free/RoHS-compliant

Ordering Information:

Applications

See page 7.

ꢀ

SONET/SDH

Networking

SD/HD video

ꢀ

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

Description

(Top View)

The Si532 dual frequency XO utilizes Silicon Laboratories’ advanced

DSPLL circuitry to provide a low jitter clock at high frequencies. The Si532 is

V_DD

available with any-rate output frequency from 10 to 945 MHz and select

frequencies to 1400 MHz. Unlike a traditional XO where a different crystal is

required for each output frequency, the Si532 uses one fixed crystal

frequency to provide a wide range of output frequencies. This IC based

approach allows the crystal resonator to provide exceptional frequency

stability and reliability. In addition, DSPLL clock synthesis provides superior

supply noise rejection, simplifying the task of generating low jitter clocks in

noisy environments typically found in communication systems. The Si532 IC

based XO is factory configurable for a wide variety of user specifications

including frequency, supply voltage, output format, and temperature stability.

Specific configurations are factory programmed at time of shipment, thereby

eliminating long lead times associated with custom oscillators.

CLK–

CLK+

GND

(LVDS/LVPECL/CML)

V_DD

Functional Block Diagram

GND

CLK

V_DD

CLK– CLK+

(CMOS)

Any-rate

10–1400 MHz

DSPLL^®

Fixed

Frequency

Clock

Synthesis

GND

Rev. 1.0 7/06

Si532

12 3 4 5 6 7...33

中文翻译

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与532AA000035BG相关器件

型号	品牌	获取价格	描述	数据表
532AA000035BGR	SILICON	获取价格	LVPECL Output Clock Oscillator, 780MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000035DG	SILICON	获取价格	LVPECL Output Clock Oscillator,
532AA000035DGR	SILICON	获取价格	LVPECL Output Clock Oscillator,
532AA000104BG	SILICON	获取价格	LVPECL Output Clock Oscillator, 156.25MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000104BGR	SILICON	获取价格	LVPECL Output Clock Oscillator, 156.25MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000105BG	SILICON	获取价格	LVPECL Output Clock Oscillator, 161.13281MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000105BGR	SILICON	获取价格	LVPECL Output Clock Oscillator, 161.13281MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000109BG	SILICON	获取价格	LVPECL Output Clock Oscillator, 74.25MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000109BGR	SILICON	获取价格	LVPECL Output Clock Oscillator, 74.25MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
532AA000114BGR	SILICON	获取价格	LVPECL Output Clock Oscillator, 200MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

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