Datasheet > 531FA532M000DG

531FA532M000DG

更新时间： 2024-11-08 16:19:43

品牌	Logo	应用领域
芯科 - SILICON		/
页数	文件大小	规格书
12页	215K
描述
暂无描述

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

531FA532M000DG 数据手册

Si530/531

REVISION D

CRYSTAL OSCILLATOR (XO)

(10 MHZ TO 1.4 GHZ)

Features

Si5602

ꢀ

Available with any-rate output

ꢀ

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

ꢀ

3rd generation DSPLL with superior

jitter performance

ꢀ

3x better frequency stability than

SAW-based oscillators

ꢀ

Pb-free/RoHS-compliant

Ordering Information:

Applications

See page 7.

ꢀ

SONET/SDH

Networking

SD/HD video

ꢀ

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

Description

(Top View)

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

V_DD

CLK–

CLK+

GND

Si530 (LVDS/LVPECL/CML)

V_DD

Functional Block Diagram

GND

CLK

V_DD

CLK– CLK+

Si530 (CMOS)

V_DD

Any-rate

10–1400 MHz

DSPLL^®

Clock

Synthesis

Fixed

Frequency

CLK–

CLK+

GND

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

12 3 4 5 6 7...12

中文翻译

下载PDF

与531FA532M000DG相关器件

型号	品牌	获取价格	描述	数据表
531FA532M000DGR	SILICON	获取价格	LVDS Output Clock Oscillator, 532MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA533M000DG	SILICON	获取价格	LVDS Output Clock Oscillator, 533MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA533M333DG	SILICON	获取价格	XO, Clock, 10MHz Min, 945MHz Max, 533.333MHz Nom
531FA533M333DGR	SILICON	获取价格	XO, Clock, 10MHz Min, 945MHz Max, 533.333MHz Nom
531FA534M000DGR	SILICON	获取价格	LVDS Output Clock Oscillator, 534MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA535M000DGR	SILICON	获取价格	LVDS Output Clock Oscillator, 535MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA536M000DGR	SILICON	获取价格	LVDS Output Clock Oscillator, 536MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA537M000DGR	SILICON	获取价格	LVDS Output Clock Oscillator, 537MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA538M000DG	SILICON	获取价格	LVDS Output Clock Oscillator, 538MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
531FA538M000DGR	SILICON	获取价格	LVDS Output Clock Oscillator, 538MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

与531FA532M000DG相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

21
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

20
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

44
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

38

产品中心

服务支持

精选活动

关于我们

帮助中心

531FA532M000DG

531FA532M000DG 数据手册

与531FA532M000DG相关器件

与531FA532M000DG相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

531FA532M000DG

531FA532M000DG 数据手册

与531FA532M000DG相关器件

与531FA532M000DG相关文章

您还可以找

您在本页遇到什么问题？