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4309-51

更新时间： 2024-11-05 03:58:27
品牌 Logo 应用领域
PSEMI 射频衰减器
页数 文件大小 规格书
9页 338K
描述
50 ヘ RF Digital Attenuator 6-bit, 31.5 dB, DC-4.0 GHz

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Product Specification  
PE4309  
50 Ω RF Digital Attenuator  
6-bit, 31.5 dB, DC-4.0 GHz  
Product Description  
Features  
This product is a high linearity, 6-bit RF Digital Step Attenuator  
(DSA) covering a 31.5 dB attenuation range in 0.5 dB steps.  
The Peregrine 50Ω RF DSA provides a parallel CMOS control  
interface and it operates on 3-volt to 5-volt supply. It maintains  
high attenuation accuracy over frequency and temperature and  
exhibits very low insertion loss and low power consumption.  
This Peregrine DSA is available in a 4x4 mm 24 lead QFN  
footprint with an exposed ground paddle.  
• Best in class 2.0 kV HBM ESD tolerance  
• Low Insertion Loss: 1.6 dB typical  
• Attenuation: 0.5 dB steps to 31.5 dB  
• High Linearity: Typical 52 dB IP3  
• Best in Class Attenuation accuracy  
• Parallel programming interface  
• Single supply, 3V to 5V operation  
The PE4309 is manufactured on Peregrine’s UltraCMOS™  
process, a patented variation of silicon-on-insulator (SOI)  
technology on a sapphire substrate, offering the performance  
of GaAs with the economy and integration of conventional  
CMOS.  
• Standard 3V or 5V CMOS control logic  
independent of supply voltage  
• Very low power consumption  
• RoHS-compliant 24-lead 4x4 mm QFN  
Figure 1. Functional Schematic Diagram  
Figure 2. Package Type  
4x4 mm 24-Lead QFN  
Switched Attenuator Array  
RF Input  
RF Output  
6
Parallel Control  
Control Logic Interface  
Table 1. Electrical Specifications@ +25°C, VDD = 3.0 V - 5.0 V  
Parameter  
Test Conditions4  
Frequency  
Min  
Typ  
Maximum  
Units  
Operation Frequency  
DC  
4000  
MHz  
DC - 2.2 GHz  
2.2 - 4.0 GHz  
-
-
1.6  
2.2  
2
3.4  
dB  
dB  
Insertion Loss  
Any Bit or Bit Combination  
Any Bit or Bit Combination  
0.5 - 7.5 dB States 3  
DC ≤ 1.0 GHz  
1.0 < 2.2 GHz  
2.2 < 3.8 GHz  
2.2 < 3.8 GHz  
2.2 < 3.8 GHz  
-
-
-
-
-
-
-
±(0.10 + 3% of atten setting), not to exceed +0.20 dB  
dB  
dB  
dB  
dB  
dB  
±(0.15 + 3% of atten setting)  
Attenuation Accuracy  
0.15  
0.7  
1.2  
-
-
-
8.0 - 15.5 dB States 3  
16.0 - 31.5 dB States3  
1 MHz - 2.2 GHz  
2.2 - 4.0 GHz  
30  
-
32  
32  
-
-
dBm  
dBm  
1 dB Compression2  
Input IP31  
1 MHz - 2.2 GHz  
2.2 - 4.0 GHz  
-
-
52  
45  
-
-
dBm  
dBm  
Two-tone inputs +18 dBm  
DC - 2.2 GHz  
2.2 - 4.0 GHz  
15  
10  
20  
20  
-
-
dB  
dB  
Return Loss  
50% of control voltage to  
90% of final attenuation level  
Switching Speed  
-
-
1
µs  
Notes: 1. Device Linearity will begin to degrade below 5 MHz.  
2. Note Absolute Maximum in Table 4.  
3. See Figures 12 and 13 for typical attenuation error.  
4. Measurements made in a 50 ohm system (see Figure 4, Test Circuit Block Diagram). Resistors (R2, R3, R5, R6, R7) with a  
value of 10K-ohm are used to decouple the RF path from the control inputs.  
Document No. 70-0218-06 │ www.psemi.com  
©2007 Peregrine Semiconductor Corp. All rights reserved.  
Page 1 of 9  
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