Product Specification
PE4305
50 Ω RF Digital Attenuator
5-bit, 15.5 dB, DC – 4.0 GHz
Product Description
Features
The PE4305 is a high linearity, 5-bit RF Digital Step Attenuator
(DSA) covering a 15.5 dB attenuation range in 0.5 dB steps,
and is pin compatible with the PE430x series. This 50-ohm RF
DSA provides both parallel (latched or direct mode) and serial
CMOS control interface, operates on a single 3-volt supply and
maintains high attenuation accuracy over frequency and
temperature. It also has a unique control interface that allows
the user to select an initial attenuation state at power-up. The
PE4305 exhibits very low insertion loss and low power
consumption. This functionality is delivered in a 4x4 mm QFN
footprint.
• Attenuation: 0.5 dB steps to 15.5 dB
• Flexible parallel and serial programming
interfaces
• Latched or direct mode
• Unique power-up state selection
• Positive CMOS control logic
• High attenuation accuracy and linearity
over temperature and frequency
• Very low power consumption
• Single-supply operation
The PE4305 is manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi®) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
• 50 Ω impedance
• Pin compatible with PE430x series
• Packaged in a 20 Lead 4x4 mm QFN
Figure 1. Functional Schematic Diagram
Figure 2. Package Type
4x4mm -20 Lead QFN
Switched Attenuator Array
RF Input
RF Output
6
3
2
Parallel Control
Serial Control
Control Logic Interface
Power-Up Control
Table 1. Electrical Specifications @ +25°C, VDD = 3.0 V
Parameter
Test Conditions
Frequency
Minimum
Typical
Maximum
Units
MHz
dB
Operation Frequency
Insertion Loss2
DC
-
4000
2.25
DC - 2.2 GHz
DC - 2.2 GHz
1.5
-
Any Bit or Bit
Combination
±(0.25 + 3% of atten setting)
not to exceed ± 0.4 dB
Attenuation Accuracy
1 dB Compression3
Input IP31, 2
-
dB
1 MHz - 2.2 GHz
1 MHz - 2.2 GHz
DC - 2.2 GHz
30
-
34
52
20
-
-
-
dBm
Two-tone inputs
+18 dBm
dBm
dB
Return Loss
15
50% control to 0.5 dB
of final value
Switching Speed
-
-
1
µs
Notes: 1. Device Linearity will begin to degrade below 1Mhz
2. See Max input rating in Table 2 & Figures on Pages 2 to 4 for data across frequency.
3. Note Absolute Maximum in Table 3.
Document No. 70/0159~02C │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
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