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4242-00

更新时间: 2024-11-12 03:00:43
品牌 Logo 应用领域
PSEMI 开关射频开关光电二极管
页数 文件大小 规格书
9页 278K
描述
SPDT UltraCMOS⑩ RF Switch

4242-00 数据手册

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Product Specification  
PE4242  
SPDT UltraCMOS™ RF Switch  
Features  
Product Description  
Single-pin or complementary CMOS  
The PE4242 UltraCMOS™ RF Switch is designed to cover a  
broad range of applications from near DC through 3000 MHz.  
This reflective switch integrates on-board CMOS control logic  
with a low voltage CMOS-compatible control interface, and can  
be controlled using either single-pin or complementary control  
inputs. Using a nominal +3-volt power supply voltage, a typical  
input 1 dB compression point of +27 dBm can be achieved.  
logic control inputs  
+3.0-volt power supply needed for  
single-pin control mode  
Low insertion loss: 0.7 dB at 1000 MHz,  
0.9 dB at 2000 MHz  
Isolation of 32 dB at 1000 MHz, 23 dB at  
2000 MHz  
The PE4242 RF Switch is manufactured on Peregrine’s  
UltraCMOS™ process, a patented variation of silicon-on-  
insulator (SOI) technology on a sapphire substrate, offering the  
performance of GaAs with the economy and integration of  
conventional CMOS.  
Typical input 1 dB compression point of  
+27 dBm  
Ultra-small SC-70 package  
Figure 1. Functional Diagram  
RFC  
Figure 2. Package Type  
6-lead SC-70  
RF1  
RF2  
CMOS  
Control  
Driver  
CTRL CTRL or VDD  
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 )  
Parameter  
Conditions  
Minimum  
Typical  
Maximum  
Units  
Operation Frequency1  
DC  
3000  
MHz  
1000 MHz  
2000 MHz  
0.7  
0.9  
0.85  
1.05  
dB  
dB  
Insertion Loss  
Isolation  
1000 MHz  
2000 MHz  
30  
21  
32  
23  
dB  
dB  
1000 MHz  
2000 MHz  
18  
16  
22  
18  
dB  
dB  
Return Loss  
‘ON’ Switching Time  
‘OFF’ Switching Time  
Video Feedthrough2  
Input 1 dB Compression  
Input IP3  
50% CTRL to 0.1 dB of final value, 1 GHz  
50% CTRL to 25 dB isolation, 1 GHz  
300  
200  
15  
ns  
ns  
mVpp  
dBm  
dBm  
2000 MHz  
26  
43  
27  
2000 MHz, 14 dBm input power  
45  
Notes: 1. Device linearity will begin to degrade below 10 MHz.  
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 test  
set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.  
Document No. 70-0095-03 www.psemi.com  
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.  
Page 1 of 9  

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