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4016BC

更新时间: 2024-10-27 22:15:07
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美国国家半导体 - NSC 开关
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8页 170K
描述
Quad Bilateral Switch

4016BC 数据手册

 浏览型号4016BC的Datasheet PDF文件第1页浏览型号4016BC的Datasheet PDF文件第2页浏览型号4016BC的Datasheet PDF文件第3页浏览型号4016BC的Datasheet PDF文件第5页浏览型号4016BC的Datasheet PDF文件第6页浏览型号4016BC的Datasheet PDF文件第7页 
AC Electrical Characteristics* (Continued)  
e
e
e
e
0V unless otherwise specified  
SS  
T
25 C, t  
§
t
f
20 ns and V  
A
r
Symbol  
Parameter  
Frequency Response Ð Switch  
b
‘‘ON’’ (Frequency at 3 dB)  
Conditions  
e eb  
5V, V  
SS  
Min  
Typ  
Max  
Units  
e
e
V
V
DD  
5V,  
40  
MHz  
C
e
5 V  
P-P  
R
1 kX, V  
,
L
IS  
V /V (1 kHz) dB,  
b
20 Log  
10 OS OS  
(Figure 4)  
e
e
eb  
5V,  
SS  
Feedthrough Ð Switch ‘‘OFF’’  
b
(Frequency at 50 dB)  
V
5V, V  
V
1.25  
0.9  
MHz  
MHz  
DD  
C
e
e
1 kX, V 5 V  
IS P-P  
R
,
L
eb  
20 Log (V /V  
10 OS IS  
(Figure 4)  
)
50 dB,  
e
e
e
eb  
V 5V,  
C(B)  
Crosstalk Between Any Two  
b
Switches (Frequency at 50 dB)  
V
DD  
V
C(A)  
5V; V  
SS  
e
e
5 V  
IS(A) P-P  
R
1 kXV  
,
L
eb  
20 Log (V /V  
10 OS(B) OS(A)  
)
50 dB,  
(Figure 5)  
e
e
10 kX  
Crosstalk; Control Input to  
Signal Output  
V
DD  
10V, R  
150  
mV  
P-P  
L
e
e
R
IN  
1 kX, V  
10V Square Wave,  
50 pF (Figure 6)  
CC  
e
C
L
e
e
(/2 V (1 kHz)  
Maximum Control Input  
R
1 kX, C  
50 pF, (Figure 7)  
L
L
e
V
V
V
V
OS(f)  
OS  
e
e
e
5V  
6.5  
8.0  
9.0  
MHz  
DD  
DD  
DD  
10V  
15V  
MHz  
MHz  
C
C
C
C
Signal Input Capacitance  
Signal Output Capacitance  
Feedthrough Capacitance  
Control Input Capacitance  
4
4
pF  
pF  
pF  
pF  
IS  
e
V
V
10V  
OS  
IOS  
IN  
DD  
e
0V  
0.2  
5
C
7.5  
*AC Paramters are guaranteed by DC correlated testing.  
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices  
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device  
operation.  
e
Note 2: V  
0V unless otherwise specified.  
Note 3: These devices should not be connected to circuits with the power ‘‘ON’’.  
Note 4: In all cases, there is approximately 5 pF of probe and jig capacitance on the output; however, this capacitance is included in C wherever it is specified.  
SS  
L
Note 5: V is the voltage at the in/out pin and V  
IS  
is the voltage at the out/in pin. V is the voltage at the control input.  
C
OS  
Note 6: If the switch input is held at V , V  
DD IHC  
If the analog switch input is connected to V , V  
SS IHC  
is the control input level that will cause the switch output to meet the standard ‘‘B’’ series V  
and I  
output levels.  
OH  
OH  
, high level current, and still  
is the control input level Ð which allows the switch tosink standard ‘‘B’’ series I  
OH  
l
l
s
maintain a V  
OL  
‘‘B’’ series. These currents are shown in Figure 8.  
AC Test Circuits and Switching Time Waveforms  
TL/F/5661–2  
FIGURE 2. t , t  
PZH PHZ  
Propagation Delay Time Control to Signal Output  
4

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