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3PV750BV-FREQ

更新时间: 2024-11-06 21:21:07
品牌 Logo 应用领域
PLETRONICS 机械输出元件振荡器
页数 文件大小 规格书
1页 42K
描述
PECL Output Clock Oscillator, 40MHz Min, 170MHz Max

3PV750BV-FREQ 技术参数

生命周期:ObsoleteReach Compliance Code:unknown
风险等级:5.59其他特性:DIFFERENTIAL PECL OUTPUT WITH ENABLE/DISABLE FUNCTION
最大控制电压:3.3 V最小控制电压:
最长下降时间:1 ns频率调整-机械:NO
频率偏移/牵引率:50 ppm频率稳定性:50%
安装特点:SURFACE MOUNT最大工作频率:170 MHz
最小工作频率:40 MHz最高工作温度:70 °C
最低工作温度:振荡器类型:PECL
输出负载:50 OHM物理尺寸:7mm x 5mm x 2mm
最长上升时间:1 ns标称供电电压:3.3 V
表面贴装:YES最大对称度:60/40 %
Base Number Matches:1

3PV750BV-FREQ 数据手册

  
Pl tronics, Inc.  
.
19013 36th Ave. W, Suite H Lynnwood, WA 98036 USA  
Manufacturer of High Quality Frequency Control Products  
PV7 PECL VCXO Series  
6 Pad Leadless Ceramic Surface Mount PECL Voltage Controlled Xtal Oscillator  
40.00 MHz 170.00 MHz  
Differential PECL Output with Enable/Disable  
Consult factory for higher frequencies  
Standard Specifications  
Overall Frequency Stability  
Operating Temperature Range  
Supply Voltage (Vcc)  
± 50 PPM over Operating Temperature Range  
°C  
3.3 volts ± 10% standard, consult factory for 5.0 volts  
0 to +70  
Supply Current (Icc)  
100 mA maximum  
Jitter  
1 pS RMS maximum, from 12 kHz to 20 MHz from carrier  
Output Load  
Enable/Disable Option (E/D)  
Output must be terminated into 50 ohms to (Vdd - 2.0 V). See Test Circuit 10 and Note 1.  
Output enabled when Pin #2 is open or at CMOS Logic “1”;  
Output disabled when Pin #2 is at CMOS Logic “0”.  
0.0 to 3.3 volts  
± 100 PPM or ± 50 PPM  
Consult factory  
Control Voltage Range (CVR)  
Pullablity over CVR  
Linearity  
Symmetry  
Tr & Tf  
Logic “1”  
40/60% to 60/40% at 50% of Vcc level (see Waveform 2)  
1.0 nS max  
Vcc - 1.02 volts minimum  
Output Waveform  
PECL with Differential Output  
Logic “0”  
Vcc - 1.63 volts maximum  
Note 1: In the typical PECL 100K logic output Voh is 2.35 volts and Vol is 1.60 volts at 3.3 Vcc. The center voltage of the PECL is therefore 1.975 volts.  
If a 50 resistor is placed between the output and Vdd – 2 volts (1.3 volts), the current through the resistor is (1.975 – 1.3) / 50 = 13.5 mA.  
W
±
The same load can be simulated by a resistor of 147 1% ohms to ground (1.975 / 0.0135 = 146.29 ohms). If additional load current is placed  
on the output, its load current must be subtracted from the 13.5 mA to calculate a new load resistor. Using similar calculations, use 274 ± 1%  
ohms to ground for 5.0V operation.  
Part Numbering Guide  
Portions of the part number that appear after the frequency may not be marked on part (C of C provided)  
3 PV7 50 B W - 155.52M - XXX (Internal Code or blank)  
Packaging  
Tray or  
16mm tape  
8mm pitch  
Supply Voltage  
Blank= 5.0 volts ±10%  
3= 3.3 volts ±10%  
Frequency in MHz  
Frequency Deviation (Pullability) over CVR  
V: ± 50 PPM  
W: ± 100 PPM  
Operating Temperature Range  
Model  
Frequency Stability  
50 = ± 50 PPM  
B: 0 to +70°C  
Consult factory for available frequencies and specs. Not all options available for all frequencies. A special part number may be assigned.  
Frequency Stability is inclusive of frequency shifts due to calibration, temperature, supply voltage, shock, vibration and load  
not to scale  
inches (mm)  
Mechanical:  
Due to part size and factory abilities, part marking may vary from lot to lot and may contain our part number or an internal code.  
Solder Pads  
.08 .09 .08  
(2.0)(2.2)(2.0)  
4
5
3
2
1
Vss  
E/D  
4
OUT  
For Best Performance,  
3
2
1
Do NOT allow any traces other  
than ground under oscillators  
(Even in buried layers). See  
Page 4A for layout guidelines.  
.063 (1.6)  
5
6
C OUT  
Vdd  
Vcon  
6
0.01m F  
bypass capacitor  
.079 (2.0)  
MAX  
.197 (5.0 ± .2)  
Feb 2004  
(425) 776 -1880, Fax: (425) 776-2760, ple-sales@pletronics.com, www.pletronics.com  
TBD  
Pl tronics, Inc.  

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