3D3215
Ò
MONOLITHIC 5-TAP 3.3V
FIXED DELAY LINE
(SERIES 3D3215)
data
3
delay
inc.
devices,
PACKAGES
FEATURES
·
·
·
·
·
·
·
·
·
·
·
All-silicon, low-power 3.3V CMOS technology
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
IN
O2
O4
1
2
3
4
8
7
6
5
VDD
O1
O3
IN
O2
VDD
1
2
3
4
8
7
6
5
O1
O3
O5
GND
O5
O4
Low ground bounce noise
3D3215Z-xx
SOIC (150 Mil)
GND
Leading- and trailing-edge accuracy
Delay range: 1.5ns through 300ns
Total delay tolerance: 2% or 0.5ns (3.3V, 25C)
Temperature stability: ±1% typical (0C-70C)
Vdd stability: ±1% typical (3.0V-3.6V)
Static Idd: 1.3ma typical
3D3215M-xx
DIP (300 Mil)
For mechanical dimensions, click here.
For package marking details, click here.
Minimum input pulse width: 25% of total delay
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 3D3215 5-Tap Delay Line product family consists of fixed-delay
3.3V CMOS integrated circuits. Each package contains a single delay
line, tapped and buffered at 5 points spaced uniformly in time. Tap-to-
tap (incremental) delay values can range from 1.5ns through 60ns. The
input is reproduced at the outputs without inversion, shifted in time as
per the user-specified dash number. The 3D3215 is 3.3V CMOS-
compatible and features both rising- and falling-edge accuracy.
IN
Delay Line Input
O1
O2
O3
O4
O5
Tap 1 Output (20%)
Tap 2 Output (40%)
Tap 3 Output (60%)
Tap 4 Output (80%)
Tap 5 Output (100%)
VDD +3.3 Volts
GND Ground
The all-CMOS 3D3215 integrated circuit has been designed as a
N/C No Connection
reliable, economic alternative to hybrid fixed delay lines. It is offered in a
standard 8-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC.
TABLE 1: PART NUMBER SPECIFICATIONS
DASH #
3D3215Z-xx
3D3215M-xx
DELAY SPECIFICATIONS
INPUT RESTRICTIONS
RECOMMENDED ABSOLUTE
Max Freq Min P.W.
TOTAL
TAP-TAP
DELAY (ns)
DELAY (ns)
Max Freq
Min P.W.
6.00 ns
-1.5
-2
-2.5
-3
-4
-5
23.8 MHz
20.8 MHz
18.5 MHz
16.7 MHz
13.9 MHz
11.9 MHz
10.4 MHz
8.33 MHz
6.67 MHz
5.56 MHz
4.42 MHz
3.33 MHz
2.66 MHz
2.22 MHz
1.67 MHz
1.33 MHz
1.11 MHz
21.0 ns
24.0 ns
27.0 ns
30.0 ns
36.0 ns
42.0 ns
48.0 ns
60.0 ns
75.0 ns
90.0 ns
113 ns
150 ns
188 ns
225 ns
300 ns
375 ns
450 ns
83.3 MHz
83.3 MHz
66.7 MHz
55.6 MHz
50.0 MHz
40.0 MHz
55.6 MHz
41.7 MHz
40.0 MHz
33.3 MHz
26.7 MHz
20.0 MHz
16.0 MHz
13.3 MHz
10.0 MHz
8.0 MHz
6.0 ± 0.5*
8.0 ± 0.5*
10.0 ± 0.5*
12.0 ± 0.5*
16.0 ± 0.5*
20.0 ± 0.5*
24.0 ± 0.5*
40.0 ± 0.8
50.0 ± 1.0
60.0 ± 1.2
75.0 ± 1.5
100 ± 2.0
125 ± 2.5
150 ± 3.0
200 ± 4.0
250 ± 5.0
300 ± 6.0
1.5 ± 0.7
2.0 ± 0.8
2.5 ± 1.0
3.0 ± 1.3
4.0 ± 1.3
5.0 ± 1.4
6.0 ± 1.4
8.0 ± 1.4
10.0 ± 1.5
12.0 ± 1.5
15.0 ± 1.5
20.0 ± 2.0
25.0 ± 2.5
30.0 ± 3.0
40.0 ± 4.0
50.0 ± 5.0
60.0 ± 6.0
6.00 ns
7.50 ns
9.00 ns
10.00 ns
12.50 ns
9.00 ns
-6
-8
12.00 ns
12.50 ns
15.00 ns
18.75 ns
25.00 ns
31.25 ns
37.50 ns
50.00 ns
62.50 ns
75.00 ns
-10
-12
-15
-20
-25
-30
-40
-50
-60
6.7 MHz
* Total delay referenced to Tap1 output; Input-to-Tap1 = 7.5ns ± 1.5ns
NOTE: Any dash number between 1.5 and 60 not shown is also available as standard
Ó2001 Data Delay Devices
Doc #01014
12/3/01
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
5秒后页面跳转
MAX232IDR数据手册：产品特性、电气参数、替代型号推荐
2N7002DW数据手册：参数解读、引脚信息、替代型号推荐
网络滤波器、EMI滤波器与EMC滤波器在电子元器件中的分类关系
NTC热敏电阻与PTC热敏电阻的应用原理及选型原则
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
