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3CN11GFREQ2NSGE8 PDF预览

3CN11GFREQ2NSGE8

更新时间: 2024-10-31 06:59:43
品牌 Logo 应用领域
艾迪悌 - IDT 机械振荡器
页数 文件大小 规格书
2页 205K
描述
CMOS Output Clock Oscillator, 100MHz Min, 133MHz Max, GREEN, SMD, 4 PIN

3CN11GFREQ2NSGE8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ObsoleteReach Compliance Code:compliant
风险等级:5.83其他特性:STAND BY; TAPE AND REEL; SUPPLY VOLTAGE 2.5V AND 1.8V ALSO AVAILLABLE
最长下降时间:1 ns频率调整-机械:NO
频率稳定性:100%JESD-609代码:e3
安装特点:SURFACE MOUNT最大工作频率:133 MHz
最小工作频率:100 MHz最高工作温度:70 °C
最低工作温度:-20 °C振荡器类型:CMOS
输出负载:4 pF物理尺寸:5.0mm x 3.2mm x 0.85mm
最长上升时间:1 ns最大供电电压:3.63 V
最小供电电压:2.97 V标称供电电压:3.3 V
表面贴装:YES最大对称度:40/60 %
端子面层:Matte Tin (Sn)Base Number Matches:1

3CN11GFREQ2NSGE8 数据手册

 浏览型号3CN11GFREQ2NSGE8的Datasheet PDF文件第2页 
CrystalFree™ Solid-State Oscillator  
3CN  
Ultra Low Power Oscillators  
PRELIMINARY DATA SHEET  
Features  
Frequency Range:  
Output Type:  
4 to 133 MHz  
CMOS  
Frequency Tolerance:  
Supply Voltage:  
Power Consumption:  
Standby Current:  
Standard Package:  
± 100 ppm  
1.8 to 3.3 V  
1.9 mA (1.8 V)  
< 1 uA  
5.0 x 3.2 x 0.85 mm  
2.5 x 2.0 x 0.85 mm  
0 to 70 °C, -20 to 70 °C  
This product is rated “Green”, please contact  
factory for environmental compliancy information  
Operating Temperature:  
Specification  
Parameter  
Symbol  
Specifications  
Conditions  
Supply Voltage  
VDD  
FSTB  
1.8 V± 5% 2.5 V±10% 3.3 V±10% Nominal ± tolerance  
± 100 ppm  
2.0 mA  
1 uA  
Total Frequency Stability*  
Frequency Stability  
Supply Current  
Quiescent Current  
Input LOW/HIGH level  
IDD  
1.9 mA  
2.2 mA  
Typical; No load condition; 75 MHz  
ISTBY  
Maximum; STBY# = GND  
VIL/VIH  
VOL  
0.3 VDD (max) /0.7 VDD (min)  
0.1 VDD (max) / 0.9 VDD (min)  
At STBY# pin  
Output LOW/HIGH level  
Rise/Fall Time  
IOL = - 1 mA / IOH = 1 mA  
TR /TF  
1.6 ns  
1.2 ns  
45% / 55%  
40% / 60%  
400 us (max)  
6 ps  
1.0 ns  
Maximum; 20% to 80% x VDD; Output load (CL) = 4 pF  
Worst case; output frequencies ≤ 100 MHz  
Worst case; output frequencies > 100 MHz  
Output valid time after VDD meets the specified range & STBY# transition  
Output load (CL) = 4 pF; 75 MHz; measured over 10K cycles  
Output load (CL) = 4 pF; 75 MHz; measured over 1K cycles  
SYM  
Symmetry  
Start-up time  
TST  
Period Jitter RMS  
PJRMS  
17 ps  
5 ps  
Cycle to Cycle Jitter(Pk-Pk) CCJPP  
120 ps  
50 ps  
40 ps  
4
4.096  
16  
5
6
6.144  
20  
7.3728  
22.5972  
50  
8
10  
12  
25  
66  
12.5  
30  
12.288  
33  
14.31818  
33.333  
74.25  
15  
36  
75  
18.432  
40  
19.44  
48  
24  
60  
24.576  
62.5  
Output Frequency  
FOUT  
37.5  
80  
49.152  
125  
66.66  
72  
98.304  
100  
133  
Contact IDT for additional frequencies  
Note: Above specifications are typical at room temperature (25°C ) unless otherwise specified.  
* Inclusive of initial frequency accuracy, operating temperature range, supply variation, load variation, 3 times solder reflow, shock, vibration and 10 years aging at 25°C.  
Package Outline and Dimensions  
Typical PCB Land Pattern  
Pin #1 ID  
Chamfer  
0.5 x 45°  
1.00 ±0.05  
3.20 ±0.1  
0.85 ±0.05  
0.0-0.05  
2.2  
0.85  
1.20 ±0.05  
STBY#  
GND  
VDD  
OUT  
5.0 x 3.2  
4L SMD  
5.0 x 3.2mm  
5.00 ±0.1  
(mm)  
2.54 bsc  
0.15  
0.20 Ref.  
1.4  
Side View  
Top View  
Bottom View  
Pin #1 ID  
Chamfer  
0.35 x 45°  
0.65 ±0.05  
1.5  
0.0-0.05  
0.85 ±0.05  
2.0 ±0.05  
0.72 ±0.05  
STBY#  
VDD  
2.5 x 2.0  
(mm)  
4L SMD  
2.5 x 2.0mm  
0.20 REF  
2.5 ±0.05  
1.35 Bsc  
0.5  
1.62 Bsc  
GND  
OUT  
0.8  
Bottom View  
www.IDT.com  
Top View  
Side View  
Mar 26, 2012  
©2011 Integrated Device Technology, Inc  

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