Obsolete Device
37LV36/65/128
36K, 64K, and 128K Serial EPROM Family
FEATURES
PACKAGE TYPES
• Operationally equivalent to Xilinx XC1700 family
• Wide voltage range 3.0 V to 6.0 V
PDIP
DATA
CLK
1
2
3
4
8
7
6
5
VCC
VPP
CEO
VSS
• Maximum read current 10 mA at 5.0 V
• Standby current 100 µA typical
• Industry standard Synchronous Serial Interface/
1 bit per rising edge of clock
RESET/OE
CE
• Full Static Operation
• Sequential Read/Program
• Cascadable Output Enable
SOIC
• 10 MHz Maximum Clock Rate @ 5.0 Vdc
• Programmable Polarity on Hardware Reset
1
2
3
4
8
7
6
5
• Programming with industry standard EPROM pro-
grammers
VCC
DATA
CLK
VPP
CEO
VSS
• Electrostatic discharge protection > 4,000 volts
• 8-pin PDIP/SOIC and 20-pin PLCC packages
• Data Retention > 200 years
RESET/OE
CE
• Temperature ranges:
-
Commercial: 0°C to +70°C
- Industrial: -40°C to +85°C
PLCC
DATA VCC
DESCRIPTION
The Microchip Technology Inc. 37LV36/65/128 is a
family of Serial OTP EPROM devices organized inter-
nally in a x32 configuration. The family also features a
cascadable option for increased memory storage
where needed. The 37LV36/65/128 is suitable for
many applications in which look-up table information
storage is desirable and provides full static operation in
the 3.0V to 6.0V VCC range. The devices also support
the industry standard serial interface to the popular
RAM-based Field Programmable Gate Arrays (FPGA).
Advanced CMOS technology makes this an ideal boot-
strap solution for today's high speed SRAM-based
FPGAs. The 37LV36/65/128 family is available in the
standard 8-pin plastic DIP, 8-pin SOIC and 20-pin
PLCC packages.
4
5
6
7
8
CLK
18
17
16
15
14
VPP
RESET/OE
CE
CEO
Vss
BLOCK DIAGRAM
Device
Bits
Programming Word
37LV36
37LV65
37LV128
36,288
65,536
131,072
1134 x 32
2048 x 32
4096 x 32
Xilinx is a registered trademark of Xilinx Corporation.
2004 Microchip Technology Inc.
DS21109F-page 1