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37LV65T/L PDF预览

37LV65T/L

更新时间: 2024-02-26 12:01:37
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器OTP只读存储器时钟内存集成电路
页数 文件大小 规格书
14页 144K
描述
2K X 32 OTPROM, PQCC20, PLASTIC, LCC-20

37LV65T/L 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-20
针数:20Reach Compliance Code:unknown
风险等级:5.92最大时钟频率 (fCLK):10 MHz
I/O 类型:COMMONJESD-30 代码:S-PQCC-J20
JESD-609代码:e0内存密度:65536 bit
内存集成电路类型:OTP ROM功能数量:1
端子数量:20字数:2048 words
字数代码:2000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:2KX32输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER并行/串行:SERIAL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
认证状态:Not Qualified最大待机电流:0.00005 A
子类别:Other Memory ICs最大压摆率:0.01 mA
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

37LV65T/L 数据手册

 浏览型号37LV65T/L的Datasheet PDF文件第2页浏览型号37LV65T/L的Datasheet PDF文件第3页浏览型号37LV65T/L的Datasheet PDF文件第4页浏览型号37LV65T/L的Datasheet PDF文件第5页浏览型号37LV65T/L的Datasheet PDF文件第6页浏览型号37LV65T/L的Datasheet PDF文件第7页 
Obsolete Device  
37LV36/65/128  
36K, 64K, and 128K Serial EPROM Family  
FEATURES  
PACKAGE TYPES  
• Operationally equivalent to Xilinx XC1700 family  
• Wide voltage range 3.0 V to 6.0 V  
PDIP  
DATA  
CLK  
1
2
3
4
8
7
6
5
VCC  
VPP  
CEO  
VSS  
• Maximum read current 10 mA at 5.0 V  
• Standby current 100 µA typical  
• Industry standard Synchronous Serial Interface/  
1 bit per rising edge of clock  
RESET/OE  
CE  
• Full Static Operation  
• Sequential Read/Program  
• Cascadable Output Enable  
SOIC  
• 10 MHz Maximum Clock Rate @ 5.0 Vdc  
• Programmable Polarity on Hardware Reset  
1
2
3
4
8
7
6
5
• Programming with industry standard EPROM pro-  
grammers  
VCC  
DATA  
CLK  
VPP  
CEO  
VSS  
• Electrostatic discharge protection > 4,000 volts  
• 8-pin PDIP/SOIC and 20-pin PLCC packages  
• Data Retention > 200 years  
RESET/OE  
CE  
Temperature ranges:  
-
Commercial: 0°C to +70°C  
- Industrial: -40°C to +85°C  
PLCC  
DATA VCC  
DESCRIPTION  
The Microchip Technology Inc. 37LV36/65/128 is a  
family of Serial OTP EPROM devices organized inter-  
nally in a x32 configuration. The family also features a  
cascadable option for increased memory storage  
where needed. The 37LV36/65/128 is suitable for  
many applications in which look-up table information  
storage is desirable and provides full static operation in  
the 3.0V to 6.0V VCC range. The devices also support  
the industry standard serial interface to the popular  
RAM-based Field Programmable Gate Arrays (FPGA).  
Advanced CMOS technology makes this an ideal boot-  
strap solution for today's high speed SRAM-based  
FPGAs. The 37LV36/65/128 family is available in the  
standard 8-pin plastic DIP, 8-pin SOIC and 20-pin  
PLCC packages.  
4
5
6
7
8
CLK  
18  
17  
16  
15  
14  
VPP  
RESET/OE  
CE  
CEO  
Vss  
BLOCK DIAGRAM  
Device  
Bits  
Programming Word  
37LV36  
37LV65  
37LV128  
36,288  
65,536  
131,072  
1134 x 32  
2048 x 32  
4096 x 32  
Xilinx is a registered trademark of Xilinx Corporation.  
2004 Microchip Technology Inc.  
DS21109F-page 1  

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