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345RILF PDF预览

345RILF

更新时间: 2024-09-16 18:17:31
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
7页 154K
描述
Clock Generator, CMOS, PDSO20

345RILF 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SSOP, SSOP20,.25Reach Compliance Code:compliant
风险等级:5.84JESD-30 代码:R-PDSO-G20
JESD-609代码:e3湿度敏感等级:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
电源:3.3 V认证状态:Not Qualified
子类别:Clock Generators标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

345RILF 数据手册

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ICS345  
Triple PLL Field Programmable SS VersaClock Synthesizer  
Description  
Features  
Packaged as 20-pin SSOP (QSOP)  
Spread spectrum capability  
The ICS345 field programmable clock synthesizer  
generates up to nine high-quality, high-frequency clock  
outputs including multiple reference clocks from a  
low-frequency crystal or clock input. It is designed to  
replace crystals and crystal oscillators in most  
electronic systems.  
Eight addressable registers  
Replaces multiple crystals and oscillators  
Output frequencies up to 200 MHz at 3.3 V  
Input crystal frequency of 5 to 27 MHz  
Input clock frequency of 2 to 50 MHz  
Up to nine reference outputs  
TM  
Using ICS’ VersaClock software to configure PLLs  
and outputs, the ICS345 contains a One-Time  
Programmable (OTP) ROM to allow field  
programmability. Programming features include eight  
selectable configuration registers, up to two sets of four  
low-skew outputs, and optional Spread Spectrum  
outputs.  
Up to two sets of four low-skew outputs  
Operating voltages of 3.3 V  
Advanced, low-power CMOS process  
For one output clock, use the ICS341. For two output  
clocks, see the ICS342. For three output clocks, see  
the ICS343. For more than three outputs, see the  
ICS345 or ICS348.  
Using Phase-Locked Loop (PLL) techniques, the  
device runs from a standard fundamental mode,  
inexpensive crystal, or clock. It can replace multiple  
crystals and oscillators, saving board space and cost.  
Available in Pb (lead) free packaging  
The ICS345 is also available in factory programmed  
custom versions for high-volume applications.  
Block Diagram  
3
VDD  
PLL1 with  
Spread  
Spectrum  
CLK1  
CLK2  
CLK3  
CLK4  
CLK5  
CLK6  
CLK7  
CLK8  
CLK9  
3
OTP  
S2:S0  
ROM  
with  
PLL  
Divide  
Logic  
and  
Output  
Enable  
Control  
Values  
PLL2  
PLL3  
Crystal or  
clock input  
X1/ICLK  
Crystal  
Oscillator  
X2  
GND  
2
External capacitors are  
required with a crystal input.  
PDTS  
MDS 345 E  
1
Revision 011205  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  

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