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345RIPLF PDF预览

345RIPLF

更新时间: 2024-11-19 01:20:35
品牌 Logo 应用领域
艾迪悌 - IDT 时钟PC光电二极管外围集成电路晶体
页数 文件大小 规格书
9页 130K
描述
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

345RIPLF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QSOP
包装说明:SSOP, SSOP20,.25针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:7.65
JESD-30 代码:R-PDSO-G20JESD-609代码:e3
长度:8.65 mm湿度敏感等级:1
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:200 MHz
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V主时钟/晶体标称频率:50 MHz
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Clock Generators最大供电电压:3.45 V
最小供电电压:3.15 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

345RIPLF 数据手册

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DATASHEET  
TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER ICS345  
Description  
Features  
The ICS345 field programmable clock synthesizer  
generates up to nine high-quality, high-frequency clock  
outputs including multiple reference clocks from a  
low-frequency crystal or clock input. It is designed to  
replace crystals and crystal oscillators in most electronic  
systems.  
Packaged as 20-pin SSOP (QSOP) (Pb-free)  
Spread spectrum capability  
Eight addressable registers  
Replaces multiple crystals and oscillators  
Output frequencies up to 200 MHz at 3.3 V  
Input crystal frequency of 5 to 27 MHz  
Input clock frequency of 2 to 50 MHz  
Up to nine reference outputs  
TM  
Using IDT’s VersaClock software to configure PLLs and  
outputs, the ICS345 contains a One-Time Programmable  
(OTP) ROM to allow field programmability. Programming  
features include eight selectable configuration registers, up  
to two sets of four low-skew outputs, and optional Spread  
Spectrum outputs.  
Up to two sets of four low-skew outputs  
Operating voltages of 3.3 V  
Advanced, low-power CMOS process  
Using Phase-Locked Loop (PLL) techniques, the device  
runs from a standard fundamental mode, inexpensive  
crystal, or clock. It can replace multiple crystals and  
oscillators, saving board space and cost.  
For one output clock, use the ICS341. For two output  
clocks, see the ICS342. For three output clocks, see the  
ICS343. For more than three outputs, see the ICS348.  
The ICS345 is also available in factory programmed custom  
versions for high-volume applications.  
Block Diagram  
3
VDD  
PLL1 with  
Spread  
CLK1  
CLK2  
CLK3  
CLK4  
CLK5  
CLK6  
CLK7  
CLK8  
CLK9  
3
OTP  
S2:S0  
ROM  
with  
Spectrum  
PLL  
Divide  
Logic  
Values  
PLL2  
PLL3  
and  
Output  
Enable  
Control  
Crystal or  
clock input  
X1/ICLK  
Crystal  
Oscillator  
X2  
GND  
2
External capacitors are  
required with a crystal input.  
PDTS  
IDT® TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER  
1
ICS345  
REV P 090613  

345RIPLF 替代型号

型号 品牌 替代类型 描述 数据表
345RPLFT IDT

完全替代

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
345RPLF IDT

完全替代

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
345RIPLFT IDT

完全替代

TRIPLE PLL FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER

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