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33874

更新时间: 2024-11-12 02:58:31
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飞思卡尔 - FREESCALE 开关
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37页 967K
描述
Quad High-Side Switch (Quad 35 mз)

33874 数据手册

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Document Number: MC33874  
Rev. 8.0, 4/2007  
Freescale Semiconductor  
Advance Information  
Quad High-Side Switch  
(Quad 35 m)  
The 33874 is one in a family of devices designed for low-voltage  
automotive and industrial lighting and motor control applications. Its  
four low RDS(ON) MOSFETs (four 35 m) can control the high sides  
33874  
of four separate resistive or inductive loads.  
HIGH-SIDE SWITCH  
Programming, control, and diagnostics are accomplished using a  
16-bit SPI interface. Additionally, each output has its own parallel  
input for pulse-width modulation (PWM) control if desired. The 33874  
allows the user to program via the SPI the fault current trip levels and  
duration of acceptable lamp inrush or motor stall intervals. Such  
programmability allows tight control of fault currents and can protect  
wiring harnesses and circuit boards as well as loads.  
The 33874 is packaged in a power-enhanced 12x12 nonleaded  
Power QFN package with exposed tabs.  
Features  
• Quad 35 mHigh-Side Switches (at 25°C)  
• Operating Voltage Range of 6.0 V to 27 V with Standby Current  
< 5.0 µA  
PNA SUFFIX (PB_FREE)  
98ARL10596D  
24-PIN PQFN (12 x 12)  
• SPI Control of Overcurrent Limit, Overcurrent Fault Blanking  
Time, Output OFF Open Load Detection, Output ON/OFF  
Control, Watchdog Timeout, Slew Rates, and Fault Status  
Reporting  
• SPI Status Reporting of Overcurrent, Open and Shorted Loads,  
Overtemperature, Undervoltage and Overvoltage Shutdown,  
Fail-Safe Pin Status, and Program Status  
ORDERING INFORMATION  
Temperature  
Package  
Device  
Range (T )  
A
MC33874BPNA/R2  
-40°C to 125°C  
24 PQFN  
• Analog Current Feedback with Selectable Ratio  
• Analog Board Temperature Feedback  
• Enhanced -16 V Reverse Polarity VPWR Protection  
• Pb-Free Packaging Designated by Suffix Code PNA  
V
V
V
V
V
DD  
DD  
PWR  
DD  
PWR  
33874  
VDD  
VPWR  
HS0  
WAKE  
SI  
SO  
SCLK  
CS  
LOAD 0  
LOAD 1  
SCLK  
CS  
HS1  
HS2  
HS3  
SI  
SO  
I/O  
RST  
MCU  
I/O  
I/O  
FS  
IN0  
IN1  
IN2  
LOAD 2  
LOAD 3  
I/O  
I/O  
I/O  
IN3  
A/D  
CSNS  
TEMP  
A/D  
GND  
GND  
FSI  
Figure 1. 33874 Simplified Application Diagram  
* This document contains certain information on a new product.  
Specifications and information herein are subject to change without notice.  
© Freescale Semiconductor, Inc., 2006. All rights reserved.  

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