Datasheet > 28C64A/P

28C64A/P

更新时间： 2024-11-24 03:55:55

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
10页	132K
描述
64K (8K x 8) CMOS EEPROM

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中文翻译

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数据手册

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28C64A/P 数据手册

Obsolete Device

28C64A

64K (8K x 8) CMOS EEPROM

FEATURES

PACKAGE TYPES

• Fast Read Access Time—150 ns

• CMOS Technology for Low Power Dissipation

- 30 mA Active

RDY/BSY

A12

• 1

28 Vcc

27 WE

26 NC

25 A8

- 100 µA Standby

A1 10

A0 11

NC 12

I/O0 13

29 A8

28 A9

24 A9

• Fast Byte Write Time—200 µs or 1 ms

• Data Retention >200 years

• High Endurance - Minimum 100,000 Erase/Write

Cycles

• Automatic Write Operation

- Internal Control Timer

23 A11

22 OE

21 A10

20 CE

19 I/O7

18 I/O6

17 I/O5

16 I/O4

15 I/O3

27 A11

26 NC

25 OE

24 A10

23 CE

22 I/O7

21 I/O6

I/O0

I/O1

I/O2

V_SS14

- Auto-Clear Before Write Operation

- On-Chip Address and Data Latches

• Data Polling

• Pin 1 indicator on PLCC on top of package

• Ready/Busy

• Chip Clear Operation

• Enhanced Data Protection

- VCC Detector

BLOCK DIAGRAM

I/O0

I/O7

- Pulse Filter

- Write Inhibit

VSS

Data Protection

VCC

Circuitry

Chip Enable/

Output Enable

Control Logic

• Electronic Signature for Device Identification

• 5-Volt-Only Operation

• Organized 8Kx8 JEDEC Standard Pinout

- 28-pin Dual-In-Line Package

- 32-pin PLCC Package

Input/Output

Buffers

Auto Erase/Write

Timing

Data

Poll

Rdy/

Busy

Program Voltage

Generation

- 28-pin SOIC Package

Y Gating

Decoder

• Available for Extended Temperature Ranges:

- Commercial: 0°C to +70°C

16K bit

Cell Matrix

- Industrial:

-40°C to +85°C

Decoder

DESCRIPTION

A12

The Microchip Technology Inc. 28C64A is a CMOS 64K non-

volatile electrically Erasable PROM. The 28C64A is

accessed like a static RAM for the read or write cycles with-

out the need of external components. During a “byte write”,

the address and data are latched internally, freeing the micro-

processor address and data bus for other operations. Fol-

lowing the initiation of write cycle, the device will go to a busy

state and automatically clear and write the latched data using

an internal control timer. To determine when the write cycle

is complete, the user has a choice of monitoring the Ready/

Busy output or using Data polling. The Ready/Busy pin is an

open drain output, which allows easy configuration in wired-

or systems. Alternatively, Data polling allows the user to read

the location last written to when the write operation is com-

plete. CMOS design and processing enables this part to be

used in systems where reduced power consumption and reli-

ability are required. A complete family of packages is offered

to provide the utmost flexibility in applications.

2004 Microchip Technology Inc.

DS11109K-page 1

12 3 4 5 6 7...10

中文翻译

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与28C64A/P相关器件

型号	品牌	获取价格	描述	数据表
28C64A/SO	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64A_04	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64A-15	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64A-15	CATALYST	获取价格	64K - BIT CMOS E2PROM
28C64A-15/J	MICROCHIP	获取价格	8K X 8 EEPROM 5V, 150 ns, CDIP28, 0.600 INCH, CERDIP-28
28C64A-15/J	VISHAY	获取价格	EEPROM, 8KX8, 150ns, Parallel, CMOS, CDIP28
28C64A-15/K	MICROCHIP	获取价格	8K X 8 EEPROM 5V, 150 ns, CQCC32, CERAMIC, LCC-32
28C64A15/L	ETC	获取价格	EEPROM
28C64A-15/L	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM
28C64A-15/P	MICROCHIP	获取价格	64K (8K x 8) CMOS EEPROM

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