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28C64A-15/L PDF预览

28C64A-15/L

更新时间: 2024-01-16 16:16:02
品牌 Logo 应用领域
美国微芯 - MICROCHIP 存储内存集成电路可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
10页 132K
描述
64K (8K x 8) CMOS EEPROM

28C64A-15/L 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCN, LCC32,.45X.55Reach Compliance Code:unknown
风险等级:5.92最长访问时间:150 ns
命令用户界面:NO数据轮询:YES
JESD-30 代码:R-XQCC-N32JESD-609代码:e0
内存密度:65536 bit内存集成电路类型:EEPROM
内存宽度:8端子数量:32
字数:8192 words字数代码:8000
最高工作温度:125 °C最低工作温度:-55 °C
组织:8KX8封装主体材料:CERAMIC
封装代码:QCCN封装等效代码:LCC32,.45X.55
封装形状:RECTANGULAR封装形式:CHIP CARRIER
并行/串行:PARALLEL电源:5 V
认证状态:Not Qualified就绪/忙碌:YES
子类别:EEPROMs标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:NO LEAD端子节距:1.27 mm
端子位置:QUAD切换位:NO
最长写入周期时间 (tWC):1 ms

28C64A-15/L 数据手册

 浏览型号28C64A-15/L的Datasheet PDF文件第2页浏览型号28C64A-15/L的Datasheet PDF文件第3页浏览型号28C64A-15/L的Datasheet PDF文件第4页浏览型号28C64A-15/L的Datasheet PDF文件第5页浏览型号28C64A-15/L的Datasheet PDF文件第6页浏览型号28C64A-15/L的Datasheet PDF文件第7页 
Obsolete Device  
28C64A  
64K (8K x 8) CMOS EEPROM  
FEATURES  
PACKAGE TYPES  
• Fast Read Access Time—150 ns  
• CMOS Technology for Low Power Dissipation  
- 30 mA Active  
RDY/BSY  
A12  
A7  
• 1  
2
28 Vcc  
27 WE  
26 NC  
25 A8  
3
A6  
4
- 100 µA Standby  
A6  
A5  
A4  
A3  
A2  
A1 10  
A0 11  
NC 12  
I/O0 13  
5
6
7
8
9
29 A8  
28 A9  
A5  
5
24 A9  
• Fast Byte Write Time—200 µs or 1 ms  
• Data Retention >200 years  
• High Endurance - Minimum 100,000 Erase/Write  
Cycles  
• Automatic Write Operation  
- Internal Control Timer  
A4  
6
23 A11  
22 OE  
21 A10  
20 CE  
19 I/O7  
18 I/O6  
17 I/O5  
16 I/O4  
15 I/O3  
27 A11  
26 NC  
25 OE  
24 A10  
23 CE  
22 I/O7  
21 I/O6  
A3  
7
A2  
8
A1  
9
A0  
10  
11  
12  
13  
I/O0  
I/O1  
I/O2  
VSS 14  
- Auto-Clear Before Write Operation  
- On-Chip Address and Data Latches  
• Data Polling  
• Pin 1 indicator on PLCC on top of package  
• Ready/Busy  
• Chip Clear Operation  
• Enhanced Data Protection  
- VCC Detector  
BLOCK DIAGRAM  
I/O0  
I/O7  
- Pulse Filter  
- Write Inhibit  
VSS  
Data Protection  
VCC  
Circuitry  
Chip Enable/  
Output Enable  
Control Logic  
CE  
• Electronic Signature for Device Identification  
• 5-Volt-Only Operation  
• Organized 8Kx8 JEDEC Standard Pinout  
- 28-pin Dual-In-Line Package  
- 32-pin PLCC Package  
OE  
WE  
Input/Output  
Buffers  
Auto Erase/Write  
Timing  
Data  
Poll  
Rdy/  
Busy  
Program Voltage  
Generation  
A0  
- 28-pin SOIC Package  
Y
Y Gating  
Decoder  
L
• Available for Extended Temperature Ranges:  
- Commercial: 0°C to +70°C  
a
t
c
h
e
s
16K bit  
Cell Matrix  
- Industrial:  
-40°C to +85°C  
X
Decoder  
DESCRIPTION  
A12  
The Microchip Technology Inc. 28C64A is a CMOS 64K non-  
volatile electrically Erasable PROM. The 28C64A is  
accessed like a static RAM for the read or write cycles with-  
out the need of external components. During a “byte write”,  
the address and data are latched internally, freeing the micro-  
processor address and data bus for other operations. Fol-  
lowing the initiation of write cycle, the device will go to a busy  
state and automatically clear and write the latched data using  
an internal control timer. To determine when the write cycle  
is complete, the user has a choice of monitoring the Ready/  
Busy output or using Data polling. The Ready/Busy pin is an  
open drain output, which allows easy configuration in wired-  
or systems. Alternatively, Data polling allows the user to read  
the location last written to when the write operation is com-  
plete. CMOS design and processing enables this part to be  
used in systems where reduced power consumption and reli-  
ability are required. A complete family of packages is offered  
to provide the utmost flexibility in applications.  
2004 Microchip Technology Inc.  
DS11109K-page 1  

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