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27C256-30/SO PDF预览

27C256-30/SO

更新时间: 2024-12-01 03:55:51
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
10页 132K
描述
256K (32K x 8) Low-Voltage CMOS EPROM

27C256-30/SO 数据手册

 浏览型号27C256-30/SO的Datasheet PDF文件第2页浏览型号27C256-30/SO的Datasheet PDF文件第3页浏览型号27C256-30/SO的Datasheet PDF文件第4页浏览型号27C256-30/SO的Datasheet PDF文件第5页浏览型号27C256-30/SO的Datasheet PDF文件第6页浏览型号27C256-30/SO的Datasheet PDF文件第7页 
Obsolete Device  
27LV256  
256K (32K x 8) Low-Voltage CMOS EPROM  
FEATURES  
PACKAGE TYPES  
PDIP  
• Wide voltage range 3.0V to 5.5V  
• High speed performance  
VPP • 1  
28 VCC  
27 A14  
26 A13  
25 A8  
24 A9  
23 A11  
22 OE  
21 A10  
20 CE  
19 O7  
18 O6  
17 O5  
16 O4  
15 O3  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
O0  
O1  
O2  
2
3
4
- 200 ns access time available at 3.0V  
• CMOS Technology for low power consumption  
- 8 mA Active current at 3.0V  
5
6
7
8
- 20 mA Active current at 5.5V  
9
10  
11  
12  
13  
- 100 µA Standby current  
• Factory programming available  
• Auto-insertion-compatible plastic packages  
• Auto ID aids automated programming  
• Separate chip enable and output enable controls  
• High speed “Express” programming algorithm  
• Organized 32K x 8: JEDEC standard pinouts  
- 28-pin Dual-in-line package  
VSS 14  
PLCC  
5
29  
A6  
A8  
6
28  
A5  
A4  
A3  
A2  
A1  
A0  
NC  
O0  
A9  
7
27  
A11  
- 32-pin PLCC package  
8
26  
25  
24  
23  
22  
21  
NC  
OE  
A10  
CE  
O7  
O6  
9
- 28-pin SOIC package  
10  
11  
12  
13  
- Tape and reel  
• Data Retention > 200 years  
• Available for the following temperature ranges:  
- Commercial:  
- Industrial:  
0°C to +70°C  
-40°C to +85°C  
SOIC  
VPP  
A12  
A7  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
VCC  
A14  
A13  
A8  
DESCRIPTION  
2
3
A6  
4
The Microchip Technology Inc. 27LV256 is a low volt-  
age (3.0 volt) CMOS EPROM designed for battery  
powered applications. The device is organized as a  
32K x 8 (32K-Byte) non-volatile memory product. The  
27LV256 consumes only 8 mA maximum of active cur-  
rent during a 3.0 volt read operation therefore improv-  
ing battery performance. This device is designed for  
very low voltage applications where conventional 5.0  
volt only EPROMS can not be used. Accessing individ-  
ual bytes from an address transition or from power-up  
(chip enable pin going low) is accomplished in less than  
200 ns at 3.0V. This device allows systems designers  
the ability to use low voltage non-volatile memory with  
today’s' low voltage microprocessors and peripherals in  
battery powered applications.  
A5  
5
A9  
A4  
6
A11  
OE  
A10  
CE  
O7  
A3  
7
A2  
8
A1  
9
A0  
10  
11  
12  
13  
14  
O0  
O1  
O2  
VSS  
O6  
O5  
O4  
O3  
A complete family of packages is offered to provide the  
most flexibility in applications. For surface mount appli-  
cations, PLCC or SOIC packaging is available. Tape  
and reel packaging is also available for PLCC or SOIC  
packages.  
2004 Microchip Technology Inc.  
DS11020H-page 1  

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