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275PGIT PDF预览

275PGIT

更新时间: 2024-11-09 19:59:59
品牌 Logo 应用领域
艾迪悌 - IDT 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
10页 220K
描述
Clock Generator, 200MHz, CMOS, PDSO16, 0.173 INCH, TSSOP-16

275PGIT 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:200 MHz封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH主时钟/晶体标称频率:27 MHz
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
宽度:4.4 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

275PGIT 数据手册

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DATASHEET  
TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER  
ICS275  
Description  
Features  
The ICS275 field programmable VCXO clock synthesizer  
generates up to four high-quality, high-frequency clock  
outputs including multiple reference clocks from a  
low-frequency crystal input. It is designed to replace  
crystals and crystal oscillators in most electronic systems.  
Packaged as 16-pin TSSOP  
Eight addressable registers  
Replaces multiple crystals and oscillators  
Output frequencies up to 200 MHz at 3.3 V  
Input crystal frequency of 5 to 27 MHz  
Up to four reference outputs  
Up to two sets of two low-skew outputs  
Operating voltages of 3.3 V  
Controllable output drive levels  
TM  
Using IDT’s VersaClock software to configure PLLs and  
outputs, the ICS275 contains a One-Time Programmable  
(OTP) ROM for field programmability. Programming  
features include VCXO, eight selectable configuration  
registers and up to two sets of two low-skew outputs.  
Advanced, low-power CMOS process  
Available in RoHS compliant packaging  
Using Phase-Locked Loop (PLL) techniques, the device  
runs from a standard fundamental mode, inexpensive  
crystal, or clock. It can replace VCXOs, multiple crystals  
and oscillators, saving board space and cost.  
The ICS275 is also available in factory programmed custom  
versions for high-volume applications.  
Block Diagram  
3
VDD  
3
OTP  
PLL1  
PLL2  
S2:S0  
CLK1  
CLK2  
CLK3  
CLK4  
ROM  
with  
PLL  
Divide  
Logic  
and  
Output  
Enable  
Control  
Values  
VIN  
PLL3  
X1  
X2  
Voltage  
Controlled  
Crystal  
Crystal  
Oscillator  
GND  
2
External capacitors  
are required.  
PDTS  
IDT™ / ICS™ TRIPLE PLL FIELD PROGRAMMABLE VCXO CLOCK SYNTHESIZER 1  
ICS275  
REV D 102808  

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